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From: Marc Zyngier <maz@kernel.org>
To: Joey Gouly <joey.gouly@arm.com>
Cc: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Fuad Tabba <tabba@google.com>, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Ben Horgan <ben.horgan@arm.com>
Subject: Re: [PATCH v4 31/43] KVM: arm64: Switch to table-driven FGU configuration
Date: Sat, 10 May 2025 10:56:29 +0100	[thread overview]
Message-ID: <87ikm86b76.wl-maz@kernel.org> (raw)
In-Reply-To: <20250508155828.GB3256485@e124191.cambridge.arm.com>

On Thu, 08 May 2025 16:58:28 +0100,
Joey Gouly <joey.gouly@arm.com> wrote:
> 
> On Tue, May 06, 2025 at 05:43:36PM +0100, Marc Zyngier wrote:
> > Defining the FGU behaviour is extremely tedious. It relies on matching
> > each set of bits from FGT registers with am architectural feature, and
> > adding them to the FGU list if the corresponding feature isn't advertised
> > to the guest.
> > 
> > It is however relatively easy to dump most of that information from
> > the architecture JSON description, and use that to control the FGU bits.
> > 
> > Let's introduce a new set of tables descripbing the mapping between
> > FGT bits and features. Most of the time, this is only a lookup in
> > an idreg field, with a few more complex exceptions.
> > 
> > While this is obviously many more lines in a new file, this is
> > mostly generated, and is pretty easy to maintain.
> 
> I didn't review every single value in the maps (autogenerated as you said), but
> I did take a look at a few.
> 
> __compute_fixed_bits() is pretty confusing, it's doing multiple things:
>   - It returns a mask of bits that didn't match (aka RES0)
>   - or it returns a mask of bits that may have a fixed value and fills out a
>     pointer with what the fixed values are.
> 
> It has the __ prefix, so it's an implemetation-detail kinda function, not
> asking you to change anything, just pointing out the most confusing part of the
> patch!

I know. My OCDing self couldn't deal with having two helpers differing
only by the position of a single bit, hence the catch-all helper. But
I'm happy to revisit this in the future to make it more palatable.

It's just that I'm getting a bit fed-up with this series... :-/

> 
> Just one small whitespace nit below.
> 
> Reviewed-by: Joey Gouly <joey.gouly@arm.com>

Thank you!

> > +	NEEDS_FEAT(HFGRTR_EL2_ERXPFGCDN_EL1|
> > +		   HFGRTR_EL2_ERXPFGCTL_EL1|
> 
> Inconsistent |.

Ah, nice. Fixed.

> > +	NEEDS_FEAT_FLAG(HDFGRTR_EL2_OSDLR_EL1, NEVER_FGU,
> > +			FEAT_DoubleLock),
> 
> This confused me at first, but it's because OSDLR_EL1 is always accessible
> (with FEAT_AA64EL1), but can only be trapped with FEAT_DoubleLock.

Exactly. This is the conjunction of two architectural constraints
(selective output from my script):

- OSDLR_EL1: # Reg cond: IsFeatureImplemented(FEAT_AA64)
- HDFGRTR_EL2.OSDLR_EL1: # Field cond: IsFeatureImplemented(FEAT_DoubleLock)

The first implies that this can never UNDEF, while the second
indicates that the trap bit only exists under specific conditions.
It's one of these cases where the architecture is playing catch-up
with itself (v8.0 vs v8.6).

Thanks again,

	M.

-- 
Jazz isn't dead. It just smells funny.


  reply	other threads:[~2025-05-10  9:58 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-06 16:43 [PATCH v4 00/43] KVM: arm64: Revamp Fine Grained Trap handling Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 01/43] arm64: sysreg: Add ID_AA64ISAR1_EL1.LS64 encoding for FEAT_LS64WB Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 02/43] arm64: sysreg: Update ID_AA64MMFR4_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 03/43] arm64: sysreg: Add layout for HCR_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 04/43] arm64: sysreg: Replace HFGxTR_EL2 with HFG{R,W}TR_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 05/43] arm64: sysreg: Update ID_AA64PFR0_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 06/43] arm64: sysreg: Update PMSIDR_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 07/43] arm64: sysreg: Update TRBIDR_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 08/43] arm64: sysreg: Update CPACR_EL1 description Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 09/43] arm64: sysreg: Add registers trapped by HFG{R,W}TR2_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 10/43] arm64: sysreg: Add registers trapped by HDFG{R,W}TR2_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 11/43] arm64: sysreg: Add system instructions trapped by HFGIRT2_EL2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 12/43] arm64: Remove duplicated sysreg encodings Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 13/43] arm64: tools: Resync sysreg.h Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 14/43] arm64: Add syndrome information for trapped LD64B/ST64B{,V,V0} Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 15/43] arm64: Add FEAT_FGT2 capability Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 16/43] KVM: arm64: Tighten handling of unknown FGT groups Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 17/43] KVM: arm64: Simplify handling of negative FGT bits Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 18/43] KVM: arm64: Handle trapping of FEAT_LS64* instructions Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 19/43] KVM: arm64: Restrict ACCDATA_EL1 undef to FEAT_LS64_ACCDATA being disabled Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 20/43] KVM: arm64: Don't treat HCRX_EL2 as a FGT register Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 21/43] KVM: arm64: Plug FEAT_GCS handling Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 22/43] KVM: arm64: Compute FGT masks from KVM's own FGT tables Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 23/43] KVM: arm64: Add description of FGT bits leading to EC!=0x18 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 24/43] KVM: arm64: Use computed masks as sanitisers for FGT registers Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 25/43] KVM: arm64: Unconditionally configure fine-grain traps Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 26/43] KVM: arm64: Propagate FGT masks to the nVHE hypervisor Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 27/43] KVM: arm64: Use computed FGT masks to setup FGT registers Marc Zyngier
2025-05-08 13:49   ` Joey Gouly
2025-05-06 16:43 ` [PATCH v4 28/43] KVM: arm64: Remove hand-crafted masks for " Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 29/43] KVM: arm64: Use KVM-specific HCRX_EL2 RES0 mask Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 30/43] KVM: arm64: Handle PSB CSYNC traps Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 31/43] KVM: arm64: Switch to table-driven FGU configuration Marc Zyngier
2025-05-08 15:58   ` Joey Gouly
2025-05-10  9:56     ` Marc Zyngier [this message]
2025-05-06 16:43 ` [PATCH v4 32/43] KVM: arm64: Validate FGT register descriptions against RES0 masks Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 33/43] KVM: arm64: Use FGT feature maps to drive RES0 bits Marc Zyngier
2025-05-15 15:24   ` Joey Gouly
2025-05-06 16:43 ` [PATCH v4 34/43] KVM: arm64: Allow kvm_has_feat() to take variable arguments Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 35/43] KVM: arm64: Use HCRX_EL2 feature map to drive fixed-value bits Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 36/43] KVM: arm64: Use HCR_EL2 " Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 37/43] KVM: arm64: Add FEAT_FGT2 registers to the VNCR page Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 38/43] KVM: arm64: Add sanitisation for FEAT_FGT2 registers Marc Zyngier
2025-05-15 16:04   ` Joey Gouly
2025-05-06 16:43 ` [PATCH v4 39/43] KVM: arm64: Add trap routing " Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 40/43] KVM: arm64: Add context-switch " Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 41/43] KVM: arm64: Allow sysreg ranges for FGT descriptors Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 42/43] KVM: arm64: Add FGT descriptors for FEAT_FGT2 Marc Zyngier
2025-05-06 16:43 ` [PATCH v4 43/43] KVM: arm64: Handle TSB CSYNC traps Marc Zyngier
2025-05-19 11:59 ` [PATCH v4 00/43] KVM: arm64: Revamp Fine Grained Trap handling Marc Zyngier

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