From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 21575C77B7A for ; Tue, 16 May 2023 08:19:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:References :In-Reply-To:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gKFzpHNExJuQZSOl54/qjrqhotqq+3ECBX2n7aXKX00=; b=23873rn5EWwwCd 06r9yDhcK+em79IxKbMAcK8T4Dwk1pw3mKyylqhSsfC+GD5nTHWKPKxr+s3zcym7HI/ZEzDud4oNZ LOb2mnQlvPLUm8ArHgVmiOT/7j6XTVcgnGvbAFSAzlyr1v6N5CyfNadONbRmO+EkPeXBnW7bb0FuU Y5kNQWS8Wla9mM8jvZ/amdf0eRg4KU2SGBORksTJraD4aevHkcMVrjJdTYuZBOmplftCjXnQO8Lqr ILpXNj+rhuXIBJC0vlcasDVbB53FTMfUbxqeGjbvmo1hzYqB2JV0Nv1iLUG0t8xp9+0N8FnsBfpct MYFt6lbLRg/Y1TGBlK0g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pyptL-004oqV-23; Tue, 16 May 2023 08:18:43 +0000 Received: from galois.linutronix.de ([2a0a:51c0:0:12e:550::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pyptI-004ooi-30 for linux-arm-kernel@lists.infradead.org; Tue, 16 May 2023 08:18:42 +0000 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1684225116; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=Y/RF0+4saSFJWcIwD0B4SoOuVVvFYLVuS5i7ESpWY5c=; b=NKvtSAPGawXLbgxpMU6eesKqHtY2Wdmp7gluRnAnVyvYLzNIBidg2+3eFuWT+BOIuYLa7R xB2rWhzPesXy0Wq6nlJbW9MOSE4tTMwbsTwx4Sr0Uqx6Y68lSvpiLectTHcqX77OL+UyL5 Gde3db8FNb8+6nBCAXLs/CSSjB0IuM5XC962RHhV+ajFpkNgQR8aYfis2LvbJ1RkuNj3M4 s1sQhoI5bjgMzPGQ/TjzHL23Ed4PnV2Ssn25Fw02q4EbKn3JqwXyER6d74jmr44v+cJAGV WlAey4Hz8CgQJV6yu1nYV3VcRRB3em6KVOUY/4d0nDVOVDraDOj96bjDg34GlQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1684225116; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=Y/RF0+4saSFJWcIwD0B4SoOuVVvFYLVuS5i7ESpWY5c=; b=h1UUO3M6yKAEoZ0Qpclg6SHetbfiovPfeFGnvfwRSOFJvkzM2e25Fte/95FfhPCbSRbQiO cZaCYF6GS3MifaCw== To: "Russell King (Oracle)" Cc: Andrew Morton , linux-mm@kvack.org, Christoph Hellwig , Uladzislau Rezki , Lorenzo Stoakes , Peter Zijlstra , Baoquan He , John Ogness , linux-arm-kernel@lists.infradead.org, Mark Rutland , Marc Zyngier , x86@kernel.org Subject: Re: Excessive TLB flush ranges In-Reply-To: <87r0rg93z5.ffs@tglx> References: <87a5y5a6kj.ffs@tglx> <87353x9y3l.ffs@tglx> <87zg658fla.ffs@tglx> <87r0rg93z5.ffs@tglx> Date: Tue, 16 May 2023 10:18:36 +0200 Message-ID: <87ilcs8zab.ffs@tglx> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230516_011841_117178_4BF73261 X-CRM114-Status: UNSURE ( 9.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, May 16 2023 at 08:37, Thomas Gleixner wrote: > On Mon, May 15 2023 at 22:31, Russell King wrote: >>> + list_for_each_entry(va, list, list) { >>> + /* flush range by one by one 'invlpg' */ >>> + for (addr = va->va_start; addr < va->va_end; addr += PAGE_SIZE) >>> + flush_tlb_one_kernel(addr); >> >> Isn't this just the same as: >> flush_tlb_kernel_range(va->va_start, va->va_end); > > Indeed. Actually not. At least not on x86 where it'd end up with 3 IPIs for that case again, instead of having one which walks the list on each CPU. Thanks, tglx _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel