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Sat, 23 Oct 2021 13:18:27 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1meGum-0015IX-OP; Sat, 23 Oct 2021 14:18:24 +0100 Date: Sat, 23 Oct 2021 14:18:24 +0100 Message-ID: <87ilxnc21r.wl-maz@kernel.org> From: Marc Zyngier To: Vladimir Murzin Cc: Mark Rutland , linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, catalin.marinas@arm.com, deanbo422@gmail.com, green.hu@gmail.com, guoren@kernel.org, jonas@southpole.se, kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk, nickhu@andestech.com, palmer@dabbelt.com, paulmck@kernel.org, paul.walmsley@sifive.com, peterz@infradead.org, shorne@gmail.com, stefan.kristiansson@saunalahti.fi, tglx@linutronix.de, torvalds@linux-foundation.org, tsbogend@alpha.franken.de, vgupta@kernel.org, will@kernel.org Subject: Re: [PATCH 09/15] irq: arm: perform irqentry in entry code In-Reply-To: References: <20211021180236.37428-1-mark.rutland@arm.com> <20211021180236.37428-10-mark.rutland@arm.com> <0efc4465-12b5-a568-0228-c744ec0509a3@arm.com> <20211022153602.GE86184@C02TD0UTHF1T.local> <1dc39ac9-1a05-cf8d-2aef-633903a6338d@arm.com> <20211022175854.GK86184@C02TD0UTHF1T.local> <87tuh8uchn.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: vladimir.murzin@arm.com, mark.rutland@arm.com, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, catalin.marinas@arm.com, deanbo422@gmail.com, green.hu@gmail.com, guoren@kernel.org, jonas@southpole.se, kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk, nickhu@andestech.com, palmer@dabbelt.com, paulmck@kernel.org, paul.walmsley@sifive.com, peterz@infradead.org, shorne@gmail.com, stefan.kristiansson@saunalahti.fi, tglx@linutronix.de, torvalds@linux-foundation.org, tsbogend@alpha.franken.de, vgupta@kernel.org, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211023_061827_736696_2C408346 X-CRM114-Status: GOOD ( 32.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, 23 Oct 2021 13:06:25 +0100, Vladimir Murzin wrote: > > On 10/22/21 7:43 PM, Marc Zyngier wrote: > > On Fri, 22 Oct 2021 18:58:54 +0100, > > Mark Rutland wrote: > >> > >> On Fri, Oct 22, 2021 at 05:34:20PM +0100, Vladimir Murzin wrote: [...] > >>> As for TODO, is [1] look something you have been thinking of? IIUC, > >>> the show stopper is that hwirq is being passed from exception entry > >>> which retrieved via xPSR (IPSR to be precise). OTOH hwirq also available > >>> via Interrupt Controller Status Register (ICSR) thus can be used in > >>> driver itself... I gave [1] a go and it runs fine, yet I admit I might > >>> be missing something... > >> > >> I hadn't thought about it in much detail, but that looks good! > >> > >> I was wondering if we needed something like a > >> handle_arch_vectored_irq(), but if we can rely on the ICSR that seems > >> simpler overall. I'm not at all familiar with M-class, so I'm not sure > >> if there are pitfalls in this area. > > > > Why can't we just use IPSR instead from the C code? It has the > > potential of being of lower latency then a MMIO read (though I have no > > idea whether it makes a material difference on M-class) and from what > > I can see in the arch spec, they are strictly equivalent. > > Hmmm, less arch specific asm(s) in driver code, no? Well, it isn't like this driver is going to be useful on anything else, is it? If there is no overhead in reading from MMIO compared to the architected register, then I agree that ICSR is the way to go. Is there any chance you could measure it on a HW platform? Or maybe in emulation? Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel