From: Thomas Gleixner <tglx@kernel.org>
To: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Ulf Hansson <ulf.hansson@linaro.org>, Frank Li <Frank.Li@nxp.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Haibo Chen <haibo.chen@nxp.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Shawn Guo <shawnguo@kernel.org>,
Lucas Stach <l.stach@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mmc@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org, s32@nxp.com,
Christophe Lizzi <clizzi@redhat.com>,
Alberto Ruiz <aruizrui@redhat.com>,
Enric Balletbo <eballetb@redhat.com>,
Eric Chanudet <echanude@redhat.com>,
Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>,
Larisa Grigore <larisa.grigore@nxp.com>
Subject: Re: [PATCH v4 5/8] irqchip/imx-irqsteer: add NXP S32N79 support
Date: Mon, 09 Mar 2026 10:23:31 +0100 [thread overview]
Message-ID: <87jyvls6ek.ffs@tglx> (raw)
In-Reply-To: <20260306161555.9000-6-ciprianmarian.costea@oss.nxp.com>
On Fri, Mar 06 2026 at 17:15, Ciprian Costea wrote:
> +/* SoC does not implement the CHANCTRL register */
> +#define IRQSTEER_QUIRK_NO_CHANCTRL BIT(0)
> +
> +struct irqsteer_devtype_data {
> + u32 quirks;
> +};
> +
> struct irqsteer_data {
> void __iomem *regs;
> struct clk *ipg_clk;
> @@ -37,8 +44,22 @@ struct irqsteer_data {
> struct irq_domain *domain;
> u32 *saved_reg;
> struct device *dev;
> + const struct irqsteer_devtype_data *devtype_data;
The struct was perfectly tabular formatted before....
https://www.kernel.org/doc/html/latest/process/maintainer-tip.html#struct-declarations-and-initializers
> };
>
> +static const struct irqsteer_devtype_data imx_data = {
> + .quirks = 0,
> +};
> +
> +static const struct irqsteer_devtype_data s32n79_data = {
> + .quirks = IRQSTEER_QUIRK_NO_CHANCTRL,
> +};
> +
> +static bool irqsteer_has_chanctrl(const struct irqsteer_devtype_data *data)
> +{
> + return !(data->quirks & IRQSTEER_QUIRK_NO_CHANCTRL);
> +}
> +
> static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
> unsigned long irqnum)
> {
> @@ -188,6 +209,10 @@ static int imx_irqsteer_probe(struct platform_device *pdev)
> if (ret)
> return ret;
>
> + data->devtype_data = device_get_match_data(&pdev->dev);
> + if (!data->devtype_data)
> + return dev_err_probe(&pdev->dev, -ENODEV,
> + "failed to match device data\n");
No point for this line break. You have 100 characters. If you have the
line break, then this needs curly brackets. See the bracket rules in the
above linked document.
> static const struct of_device_id imx_irqsteer_dt_ids[] = {
> - { .compatible = "fsl,imx-irqsteer", },
> + { .compatible = "fsl,imx-irqsteer", .data = &imx_data },
> + { .compatible = "nxp,s32n79-irqsteer", .data = &s32n79_data },
Tabular layout please for readability sake.
Thanks,
tglx
next prev parent reply other threads:[~2026-03-09 9:23 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-06 16:15 [PATCH v4 0/8] arm64: Add initial support for NXP S32N79 SoC Ciprian Costea
2026-03-06 16:15 ` [PATCH v4 1/8] dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support Ciprian Costea
2026-03-07 10:57 ` Krzysztof Kozlowski
2026-03-06 16:15 ` [PATCH v4 2/8] dt-bindings: mmc: fsl-imx-esdhc: " Ciprian Costea
2026-03-07 10:58 ` Krzysztof Kozlowski
2026-03-06 16:15 ` [PATCH v4 3/8] dt-bindings: arm: fsl: Add NXP S32N79 SoC and RDB board Ciprian Costea
2026-03-07 10:58 ` Krzysztof Kozlowski
2026-03-06 16:15 ` [PATCH v4 4/8] mmc: sdhci-esdhc-imx: add NXP S32N79 support Ciprian Costea
2026-03-09 3:13 ` Bough Chen
2026-03-11 9:11 ` Adrian Hunter
2026-03-06 16:15 ` [PATCH v4 5/8] irqchip/imx-irqsteer: " Ciprian Costea
2026-03-09 9:23 ` Thomas Gleixner [this message]
2026-03-09 9:40 ` Ciprian Marian Costea
2026-03-06 16:15 ` [PATCH v4 6/8] irqchip: add ARCH_S32 dependency to Kconfig Ciprian Costea
2026-03-09 9:27 ` Thomas Gleixner
2026-03-09 9:43 ` Ciprian Marian Costea
2026-03-06 16:15 ` [PATCH v4 7/8] arm64: dts: freescale: Add NXP S32N79 SoC support Ciprian Costea
2026-03-06 16:15 ` [PATCH v4 8/8] arm64: dts: freescale: Add NXP S32N79-RDB board support Ciprian Costea
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