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Fri, 29 May 2020 07:11:38 -0700 References: <20200513133122.25121-1-lars.povlsen@microchip.com> <20200513133122.25121-3-lars.povlsen@microchip.com> <6398c7a6-ce5e-1df6-d5a6-08664a7fc123@intel.com> <87v9ktoc0h.fsf@soft-dev15.microsemi.net> <87wo56q2o3.fsf@soft-dev15.microsemi.net> <87sgfoozt8.fsf@soft-dev15.microsemi.net> From: Lars Povlsen To: Adrian Hunter Subject: Re: [PATCH 2/3] sdhci: sparx5: Add Sparx5 SoC eMMC driver In-Reply-To: <87sgfoozt8.fsf@soft-dev15.microsemi.net> Date: Fri, 29 May 2020 16:11:37 +0200 Message-ID: <87k10uq19i.fsf@soft-dev15.microsemi.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200529_071142_235168_40FD30B7 X-CRM114-Status: GOOD ( 17.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , List-Id: Cc: devicetree@vger.kernel.org, Ulf Hansson , Alexandre Belloni , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Microchip Linux Driver Support , SoC Team , Lars Povlsen , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Lars Povlsen writes: > Adrian Hunter writes: > >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On 20/05/20 2:14 pm, Lars Povlsen wrote: >>> >>> Lars Povlsen writes: >>> >>>> Adrian Hunter writes: >>>> >>>>> On 13/05/20 4:31 pm, Lars Povlsen wrote: >>>>>> This adds the eMMC driver for the Sparx5 SoC. It is based upon the >>>>>> designware IP, but requires some extra initialization and quirks. >>>>>> >>>>>> Reviewed-by: Alexandre Belloni >>>>>> Signed-off-by: Lars Povlsen >>>>>> --- >>> {Snip] >>>>>> +}; >>>>>> + >>>>>> +static const struct sdhci_pltfm_data sdhci_sparx5_pdata = { >>>>>> + .quirks = 0, >>>>>> + .quirks2 = SDHCI_QUIRK2_HOST_NO_CMD23 | /* Card quirk */ >>>>> >>>>> If this is a card quirk then it should be in drivers/mmc/core/quirks.h not here. >>>> >>> >>> Adrian, I had a go at changing the controller quirk to a card quirk. >>> >>> Unfortunately, SDHCI_QUIRK2_HOST_NO_CMD23 does not directly translate to >>> MMC_QUIRK_BLK_NO_CMD23, as for 'do_rel_wr' in mmc_blk_rw_rq_prep(), it >>> will *still* use MMC_SET_BLOCK_COUNT (cmd23), causing the issue. >>> >>> We are using a ISSI "IS004G" device, and so I have gone through the >>> motions of adding it to quirks.h. The comment before the list of devices >>> using MMC_QUIRK_BLK_NO_CMD23 suggest working around a performance issue, >>> which is not exactly the issue I'm seeing. I'm seeing combinations of >>> CMD_TOUT_ERR, DATA_CRC_ERR and DATA_END_BIT_ERR whenever a cmd23 is >>> issued. >>> >>> I have not been able to test the controller with another eMMC device >>> yet, but I expect its not the controller at fault. >>> >>> So, I'm a little bit in doubt of how to proceed - either keep the quirk >>> as a controller quirk - or make a *new* card quirk (with >>> SDHCI_QUIRK2_HOST_NO_CMD23 semantics)? >>> >>> Anybody else have had experience with ISSI eMMC devices? >>> >>> I have also tried to use DT sdhci-caps-mask, but MMC_CAP_CMD23 is not >>> read from the controller just (unconditionally) set in sdhci.c - so that >>> doesn't fly either. >>> >>> Any suggestions? >> >> It is up to you. In the future, you may want to distinguish devices that >> have this problem from ones that do not. >> >> If you are not sure it is the ISSI eMMC, and maybe not the host controller, >> then might it be the board? Perhaps make SDHCI_QUIRK2_HOST_NO_CMD23 >> conditional on the particular compatibility string? >> >> At a minimum, change the "/* Card quirk */" comment to a fuller explanation. >> > > Adrian, I'm getting a board ready with another eMMC device, and we're > also trying to contact ISSI for info. > > My hope is to at least verify whether this is a controller or a card > issue one way or the other. Then, I'll choose an appropriate solution > for it. > > Thank you for your advice so far. > I was able to try on a board with another eMMC card (panasonic), so that clearly casts the suspicion on the controller, and ISSI is in the clear. I reintroduced the original SDHCI_QUIRK2_HOST_NO_CMD23 quirk, with a "Controller issue" comment. I will refresh the series shortly. Cheers, > ---Lars > >>> >>>> Yes, its supposedly a card quirk. I'll see to use the card quirks >>>> methods in place. >>>> >>> -- Lars Povlsen, Microchip _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel