[PATCH v3 1/2] ARM: dts: socfgpa: set bridges status to disabled

[PATCH v3 1/2] ARM: dts: socfgpa: set bridges status to disabled

[Steffen Trumtrar]

The hps-to-fpga bridges can't be used, when the FPGA is not programmed.
Set the default state to disabled and leave enabling them to the board-specific
dts files.
Although this changes behavior, there are no in-tree users of the bridges, so
this won't break anything.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/socfpga.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 4f3993cc0227..7f0480354ee6 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -531,6 +531,7 @@ fpga_bridge0: fpga_bridge@ff400000 {
 			reg = <0xff400000 0x100000>;
 			resets = <&rst LWHPS2FPGA_RESET>;
 			clocks = <&l4_main_clk>;
+			status = "disabled";
 		};
 
 		fpga_bridge1: fpga_bridge@ff500000 {
@@ -538,6 +539,7 @@ fpga_bridge1: fpga_bridge@ff500000 {
 			reg = <0xff500000 0x10000>;
 			resets = <&rst HPS2FPGA_RESET>;
 			clocks = <&l4_main_clk>;
+			status = "disabled";
 		};
 
 		fpgamgr0: fpgamgr@ff706000 {
-- 
2.26.0.rc2


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[PATCH v3 2/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges

[Steffen Trumtrar]

Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 7f0480354ee6..c2b54af417a2 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 {
 			status = "disabled";
 		};
 
+		fpga_bridge2: fpga-bridge@ff600000 {
+			compatible = "altr,socfpga-fpga2hps-bridge";
+			reg = <0xff600000 0x100000>;
+			resets = <&rst FPGA2HPS_RESET>;
+			clocks = <&l4_main_clk>;
+			status = "disabled";
+		};
+
+		fpga_bridge3: fpga-bridge@ffc25080 {
+			compatible = "altr,socfpga-fpga2sdram-bridge";
+			reg = <0xffc25080 0x4>;
+			status = "disabled";
+		};
+
 		fpgamgr0: fpgamgr@ff706000 {
 			compatible = "altr,socfpga-fpga-mgr";
 			reg = <0xff706000 0x1000
-- 
2.26.0.rc2


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Re: [PATCH v3 2/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges

[Steffen Trumtrar]

Hi,

Steffen Trumtrar <s.trumtrar@pengutronix.de> writes:

> Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
>  arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/socfpga.dtsi 
> b/arch/arm/boot/dts/socfpga.dtsi
> index 7f0480354ee6..c2b54af417a2 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 {
>  			status = "disabled";
>  		};
>  
> +		fpga_bridge2: fpga-bridge@ff600000 {
> +			compatible = 
> "altr,socfpga-fpga2hps-bridge";
> +			reg = <0xff600000 0x100000>;
> +			resets = <&rst FPGA2HPS_RESET>;
> +			clocks = <&l4_main_clk>;
> +			status = "disabled";
> +		};
> +
> +		fpga_bridge3: fpga-bridge@ffc25080 {
> +			compatible = 
> "altr,socfpga-fpga2sdram-bridge";
> +			reg = <0xffc25080 0x4>;
> +			status = "disabled";
> +		};
> +
>  		fpgamgr0: fpgamgr@ff706000 {
>  			compatible = "altr,socfpga-fpga-mgr";
>  			reg = <0xff706000 0x1000

friendly reminder.

Last time (on version 2) the discussion ended with "leave it to 
the board files, because accessing the bridges without FPGA 
firmware is bad". Which is correct of course. I still don't see 
why the bridges nodes shouldn't be in the socfpga.dtsi and will 
then be just enabled in the board files without having to define 
the resets and all.


Best regards,
Steffen Trumtrar

-- 
Pengutronix e.K.                | Dipl.-Inform. Steffen Trumtrar |
Steuerwalder Str. 21            | https://www.pengutronix.de/    |
31137 Hildesheim, Germany       | Phone: +49-5121-206917-0       |
Amtsgericht Hildesheim, HRA 2686| Fax:   +49-5121-206917-5555    |

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Re: [PATCH v3 2/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges

[Dinh Nguyen]

Hi Steffen,

On 5/4/20 3:43 AM, Steffen Trumtrar wrote:
> 
> Hi,
> 
> Steffen Trumtrar <s.trumtrar@pengutronix.de> writes:
> 
>> Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
>>
>> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
>> ---
>>  arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
>>  1 file changed, 14 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/socfpga.dtsi
>> b/arch/arm/boot/dts/socfpga.dtsi
>> index 7f0480354ee6..c2b54af417a2 100644
>> --- a/arch/arm/boot/dts/socfpga.dtsi
>> +++ b/arch/arm/boot/dts/socfpga.dtsi
>> @@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 {
>>              status = "disabled";
>>          };
>>  
>> +        fpga_bridge2: fpga-bridge@ff600000 {
>> +            compatible = "altr,socfpga-fpga2hps-bridge";
>> +            reg = <0xff600000 0x100000>;
>> +            resets = <&rst FPGA2HPS_RESET>;
>> +            clocks = <&l4_main_clk>;
>> +            status = "disabled";
>> +        };
>> +
>> +        fpga_bridge3: fpga-bridge@ffc25080 {
>> +            compatible = "altr,socfpga-fpga2sdram-bridge";
>> +            reg = <0xffc25080 0x4>;
>> +            status = "disabled";
>> +        };
>> +
>>          fpgamgr0: fpgamgr@ff706000 {
>>              compatible = "altr,socfpga-fpga-mgr";
>>              reg = <0xff706000 0x1000
> 
> friendly reminder.
> 
> Last time (on version 2) the discussion ended with "leave it to the
> board files, because accessing the bridges without FPGA firmware is
> bad". Which is correct of course. I still don't see why the bridges
> nodes shouldn't be in the socfpga.dtsi and will then be just enabled in
> the board files without having to define the resets and all.
> 
> 

I've applied both patches.

Thanks,
Dinh

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Re: [PATCH v3 2/2] ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges

[Steffen Trumtrar]

Dinh Nguyen <dinguyen@kernel.org> writes:

> Hi Steffen,
>
> On 5/4/20 3:43 AM, Steffen Trumtrar wrote:
>> 
>> Hi,
>> 
>> Steffen Trumtrar <s.trumtrar@pengutronix.de> writes:
>> 
>>> Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
>>>
>>> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
>>> ---
>>>  arch/arm/boot/dts/socfpga.dtsi | 14 ++++++++++++++
>>>  1 file changed, 14 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/socfpga.dtsi
>>> b/arch/arm/boot/dts/socfpga.dtsi
>>> index 7f0480354ee6..c2b54af417a2 100644
>>> --- a/arch/arm/boot/dts/socfpga.dtsi
>>> +++ b/arch/arm/boot/dts/socfpga.dtsi
>>> @@ -542,6 +542,20 @@ fpga_bridge1: fpga_bridge@ff500000 {
>>>              status = "disabled";
>>>          };
>>>  
>>> +        fpga_bridge2: fpga-bridge@ff600000 {
>>> +            compatible = "altr,socfpga-fpga2hps-bridge";
>>> +            reg = <0xff600000 0x100000>;
>>> +            resets = <&rst FPGA2HPS_RESET>;
>>> +            clocks = <&l4_main_clk>;
>>> +            status = "disabled";
>>> +        };
>>> +
>>> +        fpga_bridge3: fpga-bridge@ffc25080 {
>>> +            compatible = "altr,socfpga-fpga2sdram-bridge";
>>> +            reg = <0xffc25080 0x4>;
>>> +            status = "disabled";
>>> +        };
>>> +
>>>          fpgamgr0: fpgamgr@ff706000 {
>>>              compatible = "altr,socfpga-fpga-mgr";
>>>              reg = <0xff706000 0x1000
>> 
>> friendly reminder.
>> 
>> Last time (on version 2) the discussion ended with "leave it to 
>> the
>> board files, because accessing the bridges without FPGA 
>> firmware is
>> bad". Which is correct of course. I still don't see why the 
>> bridges
>> nodes shouldn't be in the socfpga.dtsi and will then be just 
>> enabled in
>> the board files without having to define the resets and all.
>> 
>> 
>
> I've applied both patches.
>

\o/

Thanks,
Steffen

-- 
Pengutronix e.K.                | Dipl.-Inform. Steffen Trumtrar |
Steuerwalder Str. 21            | https://www.pengutronix.de/    |
31137 Hildesheim, Germany       | Phone: +49-5121-206917-0       |
Amtsgericht Hildesheim, HRA 2686| Fax:   +49-5121-206917-5555    |

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