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Wed, 02 Sep 2026 07:47:03 +0000 Date: Wed, 02 Sep 2026 08:49:36 +0100 Message-ID: <87ld9km6sv.wl-maz@kernel.org> From: Marc Zyngier To: Steffen Eiden Cc: kvm@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org, Alexander Gordeev , Andreas Grapentin , Arnd Bergmann , Catalin Marinas , Christian Borntraeger , Claudio Imbrenda , David Hildenbrand , Friedrich Welter , Fuad Tabba , Gautam Gala , Hariharan Mari , Heiko Carstens , Hendrik Brueckner , Ilya Leoshkevich , Janosch Frank , Joey Gouly , Nico Boehr , Nina Schoetterl-Glausch , Oliver Upton , Paolo Bonzini , Suzuki K Poulose , Sven Schnelle , Ulrich Weigand , Vasily Gorbik , Will Deacon , Zenghui Yu Subject: Re: [PATCH v2 03/20] arm64: sysreg: Define OSLSR_EL1_OSLK_MASK In-Reply-To: <20260901092552.231001-A-seiden@linux.ibm.com> References: <20260831145536.913567-1-seiden@linux.ibm.com> <20260831145536.913567-4-seiden@linux.ibm.com> <87v78pmmtz.wl-maz@kernel.org> <20260901092552.231001-A-seiden@linux.ibm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: seiden@linux.ibm.com, kvm@vger.kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org, agordeev@linux.ibm.com, gra@linux.ibm.com, arnd@arndb.de, catalin.marinas@arm.com, borntraeger@linux.ibm.com, imbrenda@linux.ibm.com, david@kernel.org, fritz@linux.ibm.com, tabba@google.com, ggala@linux.ibm.com, hari55@linux.ibm.com, hca@linux.ibm.com, brueckner@linux.ibm.com, iii@linux.ibm.com, frankja@linux.ibm.com, joey.gouly@arm.com, nrb@linux.ibm.com, oss@nina.schoetterlglausch.eu, oupton@kernel.org, pbonzini@redhat.com, suzuki.poulose@arm.com, svens@linux.ibm.com, Ulrich.Weigand@de.ibm.com, gor@linux.ibm.com, will@kernel.org, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 01 Sep 2026 10:25:52 +0100, Steffen Eiden wrote: > > On Tue, Sep 01, 2026 at 08:51:04AM +0100, Marc Zyngier wrote: > > On Mon, 31 Aug 2026 15:55:18 +0100, > > Steffen Eiden wrote: > > > > > > Define the missing mask for the OLSK field of OSLSR_EL1 which is > > > required to safely write a value to that field. > > > > > > Signed-off-by: Steffen Eiden > > > --- > > > arch/arm64/include/asm/sysreg.h | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > > > index 1c5c4df260be..5a439853b721 100644 > > > --- a/arch/arm64/include/asm/sysreg.h > > > +++ b/arch/arm64/include/asm/sysreg.h > > > @@ -200,6 +200,7 @@ > > > #define OSLSR_EL1_OSLM_NI 0 > > > #define OSLSR_EL1_OSLM_IMPLEMENTED BIT(3) > > > #define OSLSR_EL1_OSLK BIT(1) > > > +#define OSLSR_EL1_OSLK_MASK BIT(1) > > > > Just move the required sysregs to the sysreg file, with the full bit > > description. This will sort this once and for all. > > You mean to the tools/syreg file to generate the descriptions? > > I wanted to do that but OSLSR has a split field (OSLM in bit 3 and 0) > which the generation tooling cannot handle. (right?) Composite fields are nothing new. We have those everywhere (page tables, for a start). > > Now that I am rethinking this: > > I could move the stuff to the tools/sysregs and in addtion define the > OSLM field here manually but this time using the generated constansts. > probably sth. like: > > #define OSLSR_EL1_OSLM_MASK (OSLSR_EL1_OSLM0_MASK | OSLSR_EL1_OSLM3_MASK) > #define OSLSR_EL1_OSLM_NI OSLSR_EL1_OSLM0_NI > #define OSLSR_EL1_OSLM_IMPLEMENTED OSLSR_EL1_OSLM3_IMPLEMENTED > > Shall I do this? Yes. Except that OSLM3 should really be OSLM1, being bit 1 of the OSLM field. And it would make a lot more sense to express NI and IMPLEMENTED in terms of the two bits, just like the JSON describes it: OSLSR_EL1 [2,0,1,1,4] MRS # Reg cond: IsFeatureImplemented(FEAT_AA64) Res0 63:4 UnsignedEnum 3 OSLM UnsignedEnum 0 OSLM 0b00 VAL_00 0b10 VAL_10 EndEnum UnsignedEnum 2 nTT EndEnum Field 1 OSLK Thanks, M. -- Jazz isn't dead. It just smells funny.