From: Thomas Gleixner <tglx@linutronix.de>
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Sascha Bischoff <sascha.bischoff@arm.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Timothy Hayes <timothy.hayes@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
"Liam R. Howlett" <Liam.Howlett@oracle.com>,
Peter Maydell <peter.maydell@linaro.org>,
Mark Rutland <mark.rutland@arm.com>,
Jiri Slaby <jirislaby@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v5 24/27] irqchip/gic-v5: Add GICv5 ITS support
Date: Mon, 23 Jun 2025 21:04:54 +0200 [thread overview]
Message-ID: <87ms9ynusp.ffs@tglx> (raw)
In-Reply-To: <aFkd0cigSKOSqUQI@lpieralisi>
On Mon, Jun 23 2025 at 11:26, Lorenzo Pieralisi wrote:
> On Fri, Jun 20, 2025 at 09:18:32PM +0200, Thomas Gleixner wrote:
>> Just add a MSI flag and set it in parent_ops::required_flags and extend
>
> I added that but it does not work (not if we use d->flags as below), it works
> if I add it as an
>
> IRQ_DOMAIN_FLAG_*
>
> and set it in irq_domain_info in the msi_create_parent_irq_domain()
> call in the GICv5 ITS driver when creating the domain.
>
>> the lib with
>>
>> struct fwnode_handle *fwh;
>>
>> fwh = d->flags & MAGIC ? fwnode_get_parent(fwspec->fwnode) : fwspec->fwnode;
>
> Here we are using the domain flags and I think that's what we want.
>
> If I go with parent_ops flag, I believe here we need to use the parent
> msi_domain_info::flags - I don't think that's what we want.
>
> It is a property of the IRQ domain so I think that adding an
>
> IRQ_DOMAIN_FLAG_FWNODE_PARENT
>
> is the best option.
>
> Please let me know.
Obviously. Doh :)
next prev parent reply other threads:[~2025-06-24 0:32 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-18 10:17 [PATCH v5 00/27] Arm GICv5: Host driver implementation Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 01/27] dt-bindings: interrupt-controller: Add Arm GICv5 Lorenzo Pieralisi
2025-06-18 18:52 ` Rob Herring (Arm)
2025-06-18 10:17 ` [PATCH v5 02/27] arm64/sysreg: Add GCIE field to ID_AA64PFR2_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 03/27] arm64/sysreg: Add ICC_PPI_PRIORITY<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 04/27] arm64/sysreg: Add ICC_ICSR_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 05/27] arm64/sysreg: Add ICC_PPI_HMR<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 06/27] arm64/sysreg: Add ICC_PPI_ENABLER<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 07/27] arm64/sysreg: Add ICC_PPI_{C/S}ACTIVER<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 08/27] arm64/sysreg: Add ICC_PPI_{C/S}PENDR<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 09/27] arm64/sysreg: Add ICC_CR0_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 10/27] arm64/sysreg: Add ICC_PCR_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 11/27] arm64/sysreg: Add ICC_IDR0_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 12/27] arm64/sysreg: Add ICH_HFGRTR_EL2 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 13/27] arm64/sysreg: Add ICH_HFGWTR_EL2 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 14/27] arm64/sysreg: Add ICH_HFGITR_EL2 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 15/27] arm64: Disable GICv5 read/write/instruction traps Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 16/27] arm64: cpucaps: Rename GICv3 CPU interface capability Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 17/27] arm64: cpucaps: Add GICv5 CPU interface (GCIE) capability Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 18/27] arm64: smp: Support non-SGIs for IPIs Lorenzo Pieralisi
2025-06-25 18:53 ` Marc Zyngier
2025-06-18 10:17 ` [PATCH v5 19/27] arm64: Add support for GICv5 GSB barriers Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 20/27] irqchip/gic-v5: Add GICv5 PPI support Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 21/27] irqchip/gic-v5: Add GICv5 IRS/SPI support Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 22/27] irqchip/gic-v5: Add GICv5 LPI/IPI support Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 23/27] irqchip/gic-v5: Enable GICv5 SMP booting Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 24/27] irqchip/gic-v5: Add GICv5 ITS support Lorenzo Pieralisi
2025-06-18 19:56 ` Lorenzo Pieralisi
2025-06-20 19:18 ` Thomas Gleixner
2025-06-23 7:43 ` Lorenzo Pieralisi
2025-06-23 9:26 ` Lorenzo Pieralisi
2025-06-23 19:04 ` Thomas Gleixner [this message]
2025-06-18 10:17 ` [PATCH v5 25/27] irqchip/gic-v5: Add GICv5 IWB support Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 26/27] docs: arm64: gic-v5: Document booting requirements for GICv5 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 27/27] arm64: Kconfig: Enable GICv5 Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87ms9ynusp.ffs@tglx \
--to=tglx@linutronix.de \
--cc=Jonathan.Cameron@huawei.com \
--cc=Liam.Howlett@oracle.com \
--cc=arnd@arndb.de \
--cc=bhelgaas@google.com \
--cc=catalin.marinas@arm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jirislaby@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=peter.maydell@linaro.org \
--cc=robh@kernel.org \
--cc=sascha.bischoff@arm.com \
--cc=timothy.hayes@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox