From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 644C5C433E0 for ; Fri, 12 Mar 2021 08:55:02 +0000 (UTC) Received: from desiato.infradead.org (unknown [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 015E664FD5 for ; Fri, 12 Mar 2021 08:54:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 015E664FD5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Subject:Cc:To: From:Message-ID:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zW1X6dvgQ2nBLjroRRAwooVddTaEZqeiz9xSq1cDhVs=; b=eLaWrVDxgcCTDy1J7+HFedwzl Clu2NKZ1h8RGSkH8VFFOuqT/AIadJ4F7IQ9ksQOQw7TvmTmlE8RnBQigAhVZ6HHqiWeTGcPZGEKO9 yBNkCfo13TYl8Re40SbJCaq5Soo2vEiXl6A1XCz0lL//zKHCxQOX3tPDa9EiUe1C4PNubk66qW1pT jkppn+JOARjR2RK0j5W+tl/meFrNI5Y5dmVdDqIorizrngbDoFWkBnkjJ2V+9o0Gh922yWq9SSlqv MyxN5+iRLlKm5UYJ/YGW5xJ5iVJFjrlKs14fZkVVLrobi87mqSTqK5hqnQCk5R+igtqARW1CmVeWU dUuANnoDg==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lKdXh-00AvhE-4W; Fri, 12 Mar 2021 08:53:09 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lKdXb-00Avfs-Iy for linux-arm-kernel@lists.infradead.org; Fri, 12 Mar 2021 08:53:05 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 184A264FCE; Fri, 12 Mar 2021 08:53:02 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lKdXX-001ATZ-Qc; Fri, 12 Mar 2021 08:52:59 +0000 Date: Fri, 12 Mar 2021 08:52:59 +0000 Message-ID: <87mtv8g3dg.wl-maz@kernel.org> From: Marc Zyngier To: Shenming Lu Cc: Eric Auger , Will Deacon , , , , , Alex Williamson , Cornelia Huck , "Lorenzo\ Pieralisi" , , Subject: Re: [PATCH v3 1/4] KVM: arm64: GICv4.1: Add function to get VLPI state In-Reply-To: References: <20210127121337.1092-1-lushenming@huawei.com> <20210127121337.1092-2-lushenming@huawei.com> <87wnuef4oj.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: lushenming@huawei.com, eric.auger@redhat.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, alex.williamson@redhat.com, cohuck@redhat.com, lorenzo.pieralisi@arm.com, wanghaibin.wang@huawei.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210312_085303_991633_F855CE1A X-CRM114-Status: GOOD ( 30.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 11 Mar 2021 12:26:38 +0000, Shenming Lu wrote: > > On 2021/3/11 16:57, Marc Zyngier wrote: > > On Wed, 27 Jan 2021 12:13:34 +0000, > > Shenming Lu wrote: > >> > >> With GICv4.1 and the vPE unmapped, which indicates the invalidation > >> of any VPT caches associated with the vPE, we can get the VLPI state > >> by peeking at the VPT. So we add a function for this. > >> > >> Signed-off-by: Shenming Lu > >> --- > >> arch/arm64/kvm/vgic/vgic-v4.c | 19 +++++++++++++++++++ > >> arch/arm64/kvm/vgic/vgic.h | 1 + > >> 2 files changed, 20 insertions(+) > >> > >> diff --git a/arch/arm64/kvm/vgic/vgic-v4.c b/arch/arm64/kvm/vgic/vgic-v4.c > >> index 66508b03094f..ac029ba3d337 100644 > >> --- a/arch/arm64/kvm/vgic/vgic-v4.c > >> +++ b/arch/arm64/kvm/vgic/vgic-v4.c > >> @@ -203,6 +203,25 @@ void vgic_v4_configure_vsgis(struct kvm *kvm) > >> kvm_arm_resume_guest(kvm); > >> } > >> > >> +/* > >> + * Must be called with GICv4.1 and the vPE unmapped, which > >> + * indicates the invalidation of any VPT caches associated > >> + * with the vPE, thus we can get the VLPI state by peeking > >> + * at the VPT. > >> + */ > >> +void vgic_v4_get_vlpi_state(struct vgic_irq *irq, bool *val) > >> +{ > >> + struct its_vpe *vpe = &irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe; > >> + int mask = BIT(irq->intid % BITS_PER_BYTE); > >> + void *va; > >> + u8 *ptr; > >> + > >> + va = page_address(vpe->vpt_page); > >> + ptr = va + irq->intid / BITS_PER_BYTE; > >> + > >> + *val = !!(*ptr & mask); > > > > What guarantees that you can actually read anything valid? Yes, the > > VPT caches are clean. But that doesn't make them coherent with CPU > > caches. > > > > You need some level of cache maintenance here. > > Yeah, and you have come up with some codes for this in v2: > > diff --git a/drivers/irqchip/irq-gic-v3-its.c > b/drivers/irqchip/irq-gic-v3-its.c > index 7db602434ac5..2dbef127ca15 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -4552,6 +4552,10 @@ static void its_vpe_irq_domain_deactivate(struct > irq_domain *domain, > > its_send_vmapp(its, vpe, false); > } > + > + if (find_4_1_its() && !atomic_read(vpe->vmapp_count)) > + gic_flush_dcache_to_poc(page_address(vpe->vpt_page), > + LPI_PENDBASE_SZ); > } > > static const struct irq_domain_ops its_vpe_domain_ops = { > > Could I add it to this series? :-) Yes, please. M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel