From mboxrd@z Thu Jan 1 00:00:00 1970 From: gregory.clement@bootlin.com (Gregory CLEMENT) Date: Tue, 27 Feb 2018 17:48:17 +0100 Subject: [PATCH] ARM64: dts: marvell: armada-cp110: Add registers clock for sata node In-Reply-To: <20180215134423.11800-1-gregory.clement@bootlin.com> (Gregory CLEMENT's message of "Thu, 15 Feb 2018 14:44:23 +0100") References: <20180215134423.11800-1-gregory.clement@bootlin.com> Message-ID: <87muzujs4u.fsf@bootlin.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, On jeu., f?vr. 15 2018, Gregory CLEMENT wrote: > This extra clock is needed to access the registers of the AHCI SATA > controller used on the Armada 7K/8K SoCs. > > The ahci drivers was already designed to support up to 5 clocks so there > is only need to update the device tree to use it. It was not noticed > until now because of wrong assumption in the clock drivers, but as this > IP really needs 2 clocks, we had to declare both of them. > Applied on mvebu/dt64 Gregory > Signed-off-by: Gregory CLEMENT > --- > arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi > index 50038434dd53..b8cf1497dc22 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi > @@ -236,7 +236,8 @@ > "generic-ahci"; > reg = <0x540000 0x30000>; > interrupts = ; > - clocks = <&CP110_LABEL(clk) 1 15>; > + clocks = <&CP110_LABEL(clk) 1 15>, > + <&CP110_LABEL(clk) 1 16>; > status = "disabled"; > }; > > -- > 2.15.1 > -- Gregory Clement, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering http://bootlin.com