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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1684324725; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=Bu0AMDxFLp3tBIXStVxYzz74iDayYiJXQy5Xc0+dHz0=; b=DJtqAo5mYRqgSvrjqSUuT3To1tTAyxuC44EK6B2tZ+Y3L4D+7uSYtQEdI/eOsPOy1WaN06 /H5FTK3KPrvZE0AQ== To: Uladzislau Rezki Cc: Uladzislau Rezki , "Russell King (Oracle)" , Andrew Morton , linux-mm@kvack.org, Christoph Hellwig , Lorenzo Stoakes , Peter Zijlstra , Baoquan He , John Ogness , linux-arm-kernel@lists.infradead.org, Mark Rutland , Marc Zyngier , x86@kernel.org Subject: Re: Excessive TLB flush ranges In-Reply-To: References: <87r0rg93z5.ffs@tglx> <87cz308y3s.ffs@tglx> <87y1lo7a0z.ffs@tglx> <87o7mk733x.ffs@tglx> <87leho6wd9.ffs@tglx> Date: Wed, 17 May 2023 13:58:44 +0200 Message-ID: <87o7mj5fuz.ffs@tglx> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230517_045847_017379_0AA5B1C0 X-CRM114-Status: GOOD ( 22.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, May 17 2023 at 13:26, Uladzislau Rezki wrote: > On Tue, May 16, 2023 at 07:04:34PM +0200, Thomas Gleixner wrote: >> The proposed flush_tlb_kernel_vas(list, num_pages) mechanism >> achieves: >> >> 1) It batches multiple ranges to _one_ invocation >> >> 2) It lets the architecture decide based on the number of pages >> whether it does a tlb_flush_all() or a flush of individual ranges. >> >> Whether the architecture uses IPIs or flushes only locally and the >> hardware propagates that is completely irrelevant. >> >> Right now any coalesced range, which is huge due to massive holes, takes >> decision #2 away. >> >> If you want to flush individual VAs from the core vmalloc code then you >> lose #1, as the aggregated number of pages might justify a tlb_flush_all(). >> >> That's a pure architecture decision and all the core code needs to do is >> to provide appropriate information and not some completely bogus request >> to flush 17312759359 pages, i.e. a ~64.5 TB range, while in reality >> there are exactly _three_ distinct pages to flush. >> > 1. > > I think, all two cases(logic) should be moved into ARCH code, so a decision > is made _not_ by vmalloc code how to flush, either fully, if it supported or > page by page that require list chasing. Which is exactly what my patch does, no? > 2. > void vfree(const void *addr) > { > ... > if (unlikely(vm->flags & VM_FLUSH_RESET_PERMS)) > vm_reset_perms(vm); <---- > ... > } > > so, all purged areas are drained in a caller context, so it is blocked > until the drain is done including flushing. I am not sure why it is done > from a caller context. > > IMHO, it should be deferred same way as we do in: > > static void free_vmap_area_noflush(struct vmap_area *va) How is that avoiding the problem? It just deferres it to some point in the future. There is no guarantee that batching will be large enough to justify a full flush. > if do not miss the point why vfree() has to do it directly. Keeping executable mappings around until some other flush happens is obviously neither a brilliant idea nor correct. Thanks tglx _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel