From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 637B7C433B4 for ; Thu, 1 Apr 2021 15:46:14 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E79EE61357 for ; Thu, 1 Apr 2021 15:46:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E79EE61357 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Subject:Cc:To: From:Message-ID:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pk9+JdgQsNU5YWI2xsVKZ2r9asaten5ycgAg5f/DhMc=; b=Yq0u2aA1PAfwbh5+lvK6rVztW IFo9FwfIOaGS/SPOTZb2ESuEeJlifAzF9NW0B8I7R2uHCWwMker/GxyTwaQrR9nr+VzeXitYNkF0O EzSGA27Ww8QoVTGosJLmI/ow4YdLFHgvFq1kzeCW4Mqytqqg6T13a2FnS2scI3ENXZWDneXUlAPbA 80p9m4PmPZzukLkF+WcYI/L6QIAgg6pXYcIb6oVh3t7HCcL7cE9Ivg0W6+OOKTPZABRQCz9aB3Wb2 ySz/YJIOOUn3hV0kfdMNZdXVPM7rcTZxTrji6kREDOTNlm4pvf+MC4DzNz+61mg7dM9AwjB2QqMY5 OycwIbgDg==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lRzUa-00A3xS-Qi; Thu, 01 Apr 2021 15:44:21 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lRzNh-00A2WW-1D for linux-arm-kernel@lists.infradead.org; Thu, 01 Apr 2021 15:37:20 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4F74461355; Thu, 1 Apr 2021 15:37:09 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lRzNb-0057PC-4y; Thu, 01 Apr 2021 16:37:07 +0100 Date: Thu, 01 Apr 2021 16:37:06 +0100 Message-ID: <87pmzeow2l.wl-maz@kernel.org> From: Marc Zyngier To: Sascha Hauer Cc: linux-edac@vger.kernel.org, Borislav Petkov , Mauro Carvalho Chehab , Tony Luck , James Morse , Robert Richter , York Sun , kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org, Rob Herring , Mark Rutland Subject: Re: [PATCH 2/2] dt-bindings: arm: cpus: Add edac-enabled property In-Reply-To: <20210401110615.15326-3-s.hauer@pengutronix.de> References: <20210401110615.15326-1-s.hauer@pengutronix.de> <20210401110615.15326-3-s.hauer@pengutronix.de> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: s.hauer@pengutronix.de, linux-edac@vger.kernel.org, bp@alien8.de, mchehab@kernel.org, tony.luck@intel.com, james.morse@arm.com, rrichter@marvell.com, york.sun@nxp.com, kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org, mark.rutland@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210401_163714_079812_FADD82DE X-CRM114-Status: GOOD ( 29.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 01 Apr 2021 12:06:15 +0100, Sascha Hauer wrote: > > Some CPUs like the Cortex-A53 and Cortex-A57 have Error Detection And > Correction (EDAC) support on their L1 and L2 caches. This is implemented > in implementation defined registers, so usage of this functionality is > not safe in virtualized environments or when EL3 already uses these > registers. > This patch adds a edac-enabled flag which can be explicitly set when > EDAC can be used. > > Signed-off-by: Sascha Hauer > --- > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > drivers/edac/cortex_arm64_l1_l2.c | 7 +++++-- > 2 files changed, 11 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > index 26b886b20b27..74be19c0544a 100644 > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > @@ -270,6 +270,12 @@ properties: > For PSCI based platforms, the name corresponding to the index of the PSCI > PM domain provider, must be "psci". > > + edac-enabled: > + $ref: '/schemas/types.yaml#/definitions/flag' > + description: > + Some CPUs support Error Detection And Correction (EDAC) on their L1 and > + L2 caches. This flag marks this function as usable. > + > qcom,saw: > $ref: '/schemas/types.yaml#/definitions/phandle' > description: | > diff --git a/drivers/edac/cortex_arm64_l1_l2.c b/drivers/edac/cortex_arm64_l1_l2.c > index 3b1e2f3ccab6..6d5355bae80c 100644 > --- a/drivers/edac/cortex_arm64_l1_l2.c > +++ b/drivers/edac/cortex_arm64_l1_l2.c > @@ -190,8 +190,11 @@ static int __init cortex_arm64_edac_driver_init(void) > for_each_possible_cpu(cpu) { > np = of_get_cpu_node(cpu, NULL); > > - if (of_match_node(cortex_arm64_edac_of_match, np)) > - cpumask_set_cpu(cpu, &compat_mask); > + if (!of_match_node(cortex_arm64_edac_of_match, np)) > + continue; > + if (!of_property_read_bool(np, "edac-enabled")) > + continue; > + cpumask_set_cpu(cpu, &compat_mask); > } > > if (cpumask_empty(&compat_mask)) This last hunk must be part of the initial patch. Otherwise, it breaks exactly as described in the commit message. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel