Re: [PATCH v2 00/16] KVM: arm64: TTW reporting on SEA and 52bit PA in S1 PTW

[Marc Zyngier <maz@kernel.org>]

On Fri, 19 Sep 2025 23:37:15 +0100,
Oliver Upton <oliver.upton@linux.dev> wrote:
> 
> On Mon, Sep 15, 2025 at 12:44:35PM +0100, Marc Zyngier wrote:
> > Yes, $SUBJECT rolls off the tongue.
> > 
> > This series was triggered by the realisation that when injecting an
> > SEA while on a S1PTW fault, we don't report the level of the walk and
> > instead give a bare SEA, which definitely violates the architecture.
> > 
> > This state of things dates back to the pre-NV days, when we didn't
> > have a S1 page table walker, and really didn't want to implement one.
> > I've since moved on and reluctantly implemented one, which means we
> > now *could* provide the level if we really wanted to.
> > 
> > However, nothing is that simple. The current code in at.c is firmly
> > 48bit, as our NV implementation doesn't yet support 52bit PA, while an
> > EL1 VM can happily enjoy LPA and LPA2. As a result, it is necessary to
> > expand the S1 PTW to support both LPA and LPA2. Joy.
> > 
> > Then, once the above is achieved, we need to hook into the PTW
> > machinery to match the first level of the walk that results in
> > accessing the faulty address. For this, we introduce a simple filter
> > mechanism that could be expanded if we needed to (no, please no).
> > 
> > Finally, we can plug this into the fault injection path, and enjoy
> > seeing the translation level being populated in the ESR_ELx register.
> > 
> > Patches on top of 6.16-rc4. I intend to take this into 6.18, so shout
> > if you don't like the idea!
> 
> Just some minor gripes, otherwise this LGTM.
> 
> Reviewed-by: Oliver Upton <oliver.upton@linux.dev>

Thanks for spending the time reviewing it and spotting some crucial
mistakes. I've applied your suggestions and pushed out the result,
which should be in the next -next.

	M.

-- 
Jazz isn't dead. It just smells funny.