From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6AC5AC433F5 for ; Mon, 11 Oct 2021 10:18:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3457A60E74 for ; Mon, 11 Oct 2021 10:18:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3457A60E74 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3fVTqdharmehDiiudpVV1q1K/FKhlI8HlfPcutizoUA=; b=DzuOkRDbzF0Zbl LckXnUnvd+muZDcSFwG4/LLiz4ha8TWkC8ab81TTIYF7quA+9Oa0VFutEkUWMmbfBNN/2tCv702HU 9tdgYPSGb9JHehwUtedrlZO3F2y/qHG/VE5jEwSSuHREg7jCbNr5kbw/k09ZGCsb3Y42tbr0ikCpY RNe8SXWxonL4QYFMpj5RdkS24IhEYholvvRRZEIm5QZe0hNkmVbanokmTdUsLTicmqS3B4zVhXKhs rYRBlawouKdIKZ25gfqpqMO8WRgYyidHQF/R2Qcz1VUYcpFpDmORlfv7JtdbAraVpGE72aEsLlnxO DCWKuMejP+OrMo7bfLIA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZsLr-008oYv-Nh; Mon, 11 Oct 2021 10:16:11 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mZsLn-008oXr-Nt for linux-arm-kernel@lists.infradead.org; Mon, 11 Oct 2021 10:16:09 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6D11060F21; Mon, 11 Oct 2021 10:16:07 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mZsLl-00FyzM-8K; Mon, 11 Oct 2021 11:16:05 +0100 Date: Mon, 11 Oct 2021 11:16:04 +0100 Message-ID: <87r1crq32z.wl-maz@kernel.org> From: Marc Zyngier To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, suzuki.poulose@arm.com, mark.rutland@arm.com, will@kernel.org, catalin.marinas@arm.com, james.morse@arm.com, steven.price@arm.com Subject: Re: [RFC V3 13/13] KVM: arm64: Enable FEAT_LPA2 based 52 bits IPA size on 4K and 16K In-Reply-To: <1632998116-11552-14-git-send-email-anshuman.khandual@arm.com> References: <1632998116-11552-1-git-send-email-anshuman.khandual@arm.com> <1632998116-11552-14-git-send-email-anshuman.khandual@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, suzuki.poulose@arm.com, mark.rutland@arm.com, will@kernel.org, catalin.marinas@arm.com, james.morse@arm.com, steven.price@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211011_031607_833110_961FBD33 X-CRM114-Status: GOOD ( 34.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 30 Sep 2021 11:35:16 +0100, Anshuman Khandual wrote: > > Stage-2 FEAT_LPA2 support is independent and also orthogonal to FEAT_LPA2 > support either in Stage-1 or in the host kernel. Stage-2 IPA range support > is evaluated from the platform via ID_AA64MMFR0_TGRAN_2_SUPPORTED_LPA2 and > gets enabled regardless of Stage-1 translation. > > Signed-off-by: Anshuman Khandual > --- > arch/arm64/include/asm/kvm_pgtable.h | 10 +++++++++- > arch/arm64/kvm/hyp/pgtable.c | 25 +++++++++++++++++++++++-- > arch/arm64/kvm/reset.c | 14 ++++++++++---- > 3 files changed, 42 insertions(+), 7 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h > index 0277838..78a9d12 100644 > --- a/arch/arm64/include/asm/kvm_pgtable.h > +++ b/arch/arm64/include/asm/kvm_pgtable.h > @@ -29,18 +29,26 @@ typedef u64 kvm_pte_t; > > #define KVM_PTE_ADDR_MASK GENMASK(47, PAGE_SHIFT) > #define KVM_PTE_ADDR_51_48 GENMASK(15, 12) > +#define KVM_PTE_ADDR_51_50 GENMASK(9, 8) > > static inline bool kvm_pte_valid(kvm_pte_t pte) > { > return pte & KVM_PTE_VALID; > } > > +void set_kvm_lpa2_enabled(void); > +bool get_kvm_lpa2_enabled(void); > + > static inline u64 kvm_pte_to_phys(kvm_pte_t pte) > { > u64 pa = pte & KVM_PTE_ADDR_MASK; > > - if (PAGE_SHIFT == 16) > + if (PAGE_SHIFT == 16) { > pa |= FIELD_GET(KVM_PTE_ADDR_51_48, pte) << 48; > + } else { > + if (get_kvm_lpa2_enabled()) Having to do a function call just for this test seems bad, specially for something that is used so often on the fault path. Why can't this be made a normal capability that indicates LPA support for the current page size? > + pa |= FIELD_GET(KVM_PTE_ADDR_51_50, pte) << 50; Where are bits 48 and 49? > + } > > return pa; > } > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > index f8ceebe..58141bf 100644 > --- a/arch/arm64/kvm/hyp/pgtable.c > +++ b/arch/arm64/kvm/hyp/pgtable.c > @@ -49,6 +49,18 @@ > #define KVM_INVALID_PTE_OWNER_MASK GENMASK(9, 2) > #define KVM_MAX_OWNER_ID 1 > > +static bool kvm_lpa2_enabled; > + > +bool get_kvm_lpa2_enabled(void) > +{ > + return kvm_lpa2_enabled; > +} > + > +void set_kvm_lpa2_enabled(void) > +{ > + kvm_lpa2_enabled = true; > +} > + > struct kvm_pgtable_walk_data { > struct kvm_pgtable *pgt; > struct kvm_pgtable_walker *walker; > @@ -126,8 +138,12 @@ static kvm_pte_t kvm_phys_to_pte(u64 pa) > { > kvm_pte_t pte = pa & KVM_PTE_ADDR_MASK; > > - if (PAGE_SHIFT == 16) > + if (PAGE_SHIFT == 16) { > pte |= FIELD_PREP(KVM_PTE_ADDR_51_48, pa >> 48); > + } else { > + if (get_kvm_lpa2_enabled()) > + pte |= FIELD_PREP(KVM_PTE_ADDR_51_50, pa >> 50); > + } > > return pte; > } > @@ -540,6 +556,9 @@ u64 kvm_get_vtcr(u64 mmfr0, u64 mmfr1, u32 phys_shift) > */ > vtcr |= VTCR_EL2_HA; > > + if (get_kvm_lpa2_enabled()) > + vtcr |= VTCR_EL2_DS; > + > /* Set the vmid bits */ > vtcr |= (get_vmid_bits(mmfr1) == 16) ? > VTCR_EL2_VS_16BIT : > @@ -577,7 +596,9 @@ static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot p > if (prot & KVM_PGTABLE_PROT_W) > attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; > > - attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh); > + if (!get_kvm_lpa2_enabled()) > + attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh); > + > attr |= KVM_PTE_LEAF_ATTR_LO_S2_AF; > attr |= prot & KVM_PTE_LEAF_ATTR_HI_SW; > *ptep = attr; > diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c > index 5ce36b0..97ec387 100644 > --- a/arch/arm64/kvm/reset.c > +++ b/arch/arm64/kvm/reset.c > @@ -315,26 +315,32 @@ u32 get_kvm_ipa_limit(void) > > int kvm_set_ipa_limit(void) > { > - unsigned int parange; > + unsigned int parange, tgran; > u64 mmfr0; > > mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1); > parange = cpuid_feature_extract_unsigned_field(mmfr0, > ID_AA64MMFR0_PARANGE_SHIFT); > + tgran = cpuid_feature_extract_unsigned_field(mmfr0, > + ID_AA64MMFR0_TGRAN_2_SHIFT); > /* > * IPA size beyond 48 bits could not be supported > * on either 4K or 16K page size. Hence let's cap > * it to 48 bits, in case it's reported as larger > * on the system. Shouldn't you fix this comment? > */ > - if (PAGE_SIZE != SZ_64K) > - parange = min(parange, (unsigned int)ID_AA64MMFR0_PARANGE_48); > + if (PAGE_SIZE != SZ_64K) { > + if (tgran == ID_AA64MMFR0_TGRAN_2_SUPPORTED_LPA2) > + set_kvm_lpa2_enabled(); > + else > + parange = min(parange, (unsigned int)ID_AA64MMFR0_PARANGE_48); > + } > > /* > * Check with ARMv8.5-GTG that our PAGE_SIZE is supported at > * Stage-2. If not, things will stop very quickly. > */ > - switch (cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_TGRAN_2_SHIFT)) { > + switch (tgran) { > case ID_AA64MMFR0_TGRAN_2_SUPPORTED_NONE: > kvm_err("PAGE_SIZE not supported at Stage-2, giving up\n"); > return -EINVAL; Another thing I don't see is how you manage TLB invalidation by level now that we gain a level 0 at 4kB, breaking the current assumptions encoded in __tlbi_level(). M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel