From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 19EF5C3DA49 for ; Sun, 28 Jul 2024 21:48:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Message-ID:Date:References:In-Reply-To:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=MiCN5gepzitqv0jDLGy0VVegjXDeeiPcRmcV359Y+j0=; b=llnn8nkP8qgj924CiWcagA3pMO 5xrtrt/f1/xwpIvz7D/zwyl5IbzgrnQT7GESQBO79/9wZJzNoJC1SXxX/ZBKC5uMt+XiOm3U/KHYk /PsfK8bqaclYcJ8qSgFyxjc0mJGNbdKWlJ6PAp3CVZWSIfhGitxAB/gVx9nzzzaSug5WHRzV+LZOZ fYNAoJsXl6QQKMXo7mNnm3hslwf972gBLyo3RRwL+HNw3IpMeymYdRrd5i97jPpQ3KwcphEKuiA91 Hn+DAD0LoMqXoHqHPKdh8kHqeOssKA+k2R3iTx8DpREwDQISGSUmbGQ9Xt4rv4i9IJXcqMayOmg7E mNocaj7Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYBkG-00000009I6M-09Fq; Sun, 28 Jul 2024 21:48:00 +0000 Received: from galois.linutronix.de ([2a0a:51c0:0:12e:550::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYBjo-00000009I4B-1NLZ for linux-arm-kernel@lists.infradead.org; Sun, 28 Jul 2024 21:47:35 +0000 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1722203251; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MiCN5gepzitqv0jDLGy0VVegjXDeeiPcRmcV359Y+j0=; b=oWhW4UzrW/N34voa6600LknvjxUMMLaRjoqtlLedajsamWF6qVHCF7FkN7fyiuNcMsmFjW aOQtbkcY03dN62g7/XfLgSA6pZZmIZtOKPl5bw+pZMczNFpOT7TwyWJeMNQAowUDvHwmx8 8LWy7+ZqWqIEp1JsrL2J9F/VdSACeIf+ubdeuzG/XyhqrLrLLefKNmqMh2Amlb9IpwnTL1 Z89LWYJFuOiPf9CRQdsJURFJ7cZlGNECkOjI8YHQRJT6Tus5ekpCx5gpMeSCnSgV4slfY7 cRHCDku8vB68k9JlF7HiTvjtn7M44jZ2UVjZYJzpKuKPNzuLvrEkvnBET25/lw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1722203251; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MiCN5gepzitqv0jDLGy0VVegjXDeeiPcRmcV359Y+j0=; b=rdmTo7J2EiYoBQnHochCe4dRhLudQCm18Vq+kYs8cPNHk+K/roGpUVApXDwbYjc59sQO3N u77QP6UfRD3utWCw== To: Marek =?utf-8?Q?Beh=C3=BAn?= , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , Ilpo =?utf-8?Q?J=C3=A4rvinen?= Cc: Marek =?utf-8?Q?Beh=C3=BAn?= Subject: Re: [PATCH 10/13] irqchip/armada-370-xp: Fix reenabling last per-CPU interrupt In-Reply-To: <20240715105156.18388-11-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> <20240715105156.18388-11-kabel@kernel.org> Date: Sun, 28 Jul 2024 23:47:30 +0200 Message-ID: <87sevtrxxp.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240728_144732_532657_BA2DF882 X-CRM114-Status: GOOD ( 11.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 15 2024 at 12:51, Marek Beh=C3=BAn wrote: > The number of per-CPU interrupts is 29 (0 to 28). This is described by > the constant MPIC_MAX_PER_CPU_IRQS, set to 28 (the maximum per-CPU > interrupt). > > Commit 0fa4ce746d1d ("irqchip/armada-370-xp: Re-enable per-CPU > interrupts at resume time") used the constant incorrectly in the > for-loop, it used the operator < instead of <=3D, causing it to iterate > only the first 28 interrupts (0 to 27), ignoring the last, 28th, > per-CPU interrupt. > > To avoid this kind of confusions, fix this issue by renaming the constant > to MPIC_PER_CPU_IRQS_NR and set it to 29, the number of per-CPU IRQs. > Update its use in mpic_is_percpu_irq() accordingly. > > Fixes: 0fa4ce746d1d ("irqchip/armada-370-xp: Re-enable per-CPU interrupts= at resume time") > Signed-off-by: Marek Beh=C3=BAn Please don't hide fixes in the middle of a refactoring series. Split them out and make sure that they can be applied w/o prerequisites so they can be easily backported. Thanks, tglx