From: Marc Zyngier <maz@kernel.org>
To: Samuel Holland <samuel@sholland.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Bartosz Golaszewski <brgl@bgdev.pl>, Guo Ren <guoren@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Russell King <linux@armlinux.org.uk>,
Wei Xu <xuwei5@hisilicon.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v2 4/6] genirq: Provide an IRQ affinity mask in non-SMP configs
Date: Tue, 21 Jun 2022 09:06:17 +0100 [thread overview]
Message-ID: <87sfny30g6.wl-maz@kernel.org> (raw)
In-Reply-To: <eb0a74ce-f444-de74-d944-87fc42091c46@sholland.org>
On Tue, 21 Jun 2022 05:03:43 +0100,
Samuel Holland <samuel@sholland.org> wrote:
>
> On 6/18/22 4:01 AM, Marc Zyngier wrote:
> > Hi Samuel,
> >
> > On Thu, 16 Jun 2022 07:40:26 +0100,
> > Samuel Holland <samuel@sholland.org> wrote:
> >>
> >> IRQ affinity masks are not allocated in uniprocessor configurations.
> >> This requires special case non-SMP code in drivers for irqchips which
> >> have per-CPU enable or mask registers.
> >>
> >> Since IRQ affinity is always the same in a uniprocessor configuration,
> >> we can still provide the correct affinity mask without allocating one
> >> per IRQ. We can reuse the system-wide cpu_possible_mask.
> >>
> >> By returning a real cpumask from irq_data_get_affinity_mask even when
> >> SMP is disabled, irqchip drivers which iterate over that mask will
> >> automatically do the right thing.
> >>
> >> Signed-off-by: Samuel Holland <samuel@sholland.org>
> >> ---
> >>
> >> (no changes since v1)
> >>
> >> include/linux/irq.h | 6 ++++++
> >> 1 file changed, 6 insertions(+)
> >>
> >> diff --git a/include/linux/irq.h b/include/linux/irq.h
> >> index 69ee4e2f36ce..d5e958b026aa 100644
> >> --- a/include/linux/irq.h
> >> +++ b/include/linux/irq.h
> >> @@ -151,7 +151,9 @@ struct irq_common_data {
> >> #endif
> >> void *handler_data;
> >> struct msi_desc *msi_desc;
> >> +#ifdef CONFIG_SMP
> >> cpumask_var_t affinity;
> >> +#endif
> >> #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
> >> cpumask_var_t effective_affinity;
> >> #endif
> >> @@ -881,7 +883,11 @@ static inline int irq_data_get_node(struct irq_data *d)
> >>
> >> static inline struct cpumask *irq_data_get_affinity_mask(struct irq_data *d)
> >> {
> >> +#ifdef CONFIG_SMP
> >> return d->common->affinity;
> >> +#else
> >> + return &__cpu_possible_mask;
> >> +#endif
> >
> > I have a bad feeling about this one. Being in a !SMP configuration
> > doesn't necessarily mean that __cpu_possible_mask only contains a
> > single CPU, specially with things like CONFIG_INIT_ALL_POSSIBLE. I can
> > also imagine an architecture populating this bitmap from firmware
> > tables irrespective of the SMP status of the kernel.
> >
> > Can't you use something like:
> >
> > return cpumask_of(0);
> >
> > which is guaranteed to be the right thing on !SMP configuration?
>
> I can if I cast away the const. However I see a lot of:
>
> cpumask_copy(irq_data_get_affinity_mask(d), foo);
>
> which I suppose is a great reason not to do what I am doing.
Ah, indeed. Not going to work very well...
> The right solution seems to be adding irq_data_update_affinity() to
> match irq_data_update_effective_affinity(), and making both getters
> return a const cpumask. Then I can use cpumask_of(0).
Sounds like a plan.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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next prev parent reply other threads:[~2022-06-21 8:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-16 6:40 [PATCH v2 0/6] genirq/irqchip: RISC-V PLIC cleanup and optimization Samuel Holland
2022-06-16 6:40 ` [PATCH v2 1/6] genirq: GENERIC_IRQ_EFFECTIVE_AFF_MASK depends on SMP Samuel Holland
2022-06-16 6:40 ` [PATCH v2 2/6] genirq: GENERIC_IRQ_IPI " Samuel Holland
2022-06-20 4:26 ` kernel test robot
2022-06-16 6:40 ` [PATCH v2 3/6] genirq: Refactor accessors to use irq_data_get_affinity_mask Samuel Holland
2022-06-16 6:40 ` [PATCH v2 4/6] genirq: Provide an IRQ affinity mask in non-SMP configs Samuel Holland
2022-06-18 9:01 ` Marc Zyngier
2022-06-21 4:03 ` Samuel Holland
2022-06-21 8:06 ` Marc Zyngier [this message]
2022-06-16 6:40 ` [PATCH v2 5/6] irqchip/sifive-plic: Make better use of the effective affinity mask Samuel Holland
2022-06-16 6:40 ` [PATCH v2 6/6] irqchip/sifive-plic: Separate the enable and mask operations Samuel Holland
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