From: Thomas Gleixner <tglx@linutronix.de>
To: Nicolin Chen <nicolinc@nvidia.com>,
jgg@nvidia.com, kevin.tian@intel.com, maz@kernel.org
Cc: joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
shuah@kernel.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kselftest@vger.kernel.org, eric.auger@redhat.com,
baolu.lu@linux.intel.com, yi.l.liu@intel.com,
yury.norov@gmail.com, jacob.pan@linux.microsoft.com,
patches@lists.linux.dev
Subject: Re: [PATCH v1 02/13] genirq/msi: Rename iommu_dma_compose_msi_msg() to msi_msg_set_addr()
Date: Thu, 13 Feb 2025 13:11:37 +0100 [thread overview]
Message-ID: <87v7tejb7q.ffs@tglx> (raw)
In-Reply-To: <0cfaefcc104e29aeb031f316537249d8d53ef7fa.1739005085.git.nicolinc@nvidia.com>
On Sat, Feb 08 2025 at 01:02, Nicolin Chen wrote:
> From: Jason Gunthorpe <jgg@nvidia.com>
>
> The new function is used to take in a u64 MSI address and store it in the
Which new function? The subject claims this is a rename. That's
confusing at best.
> msi_msg. If the iommu has provided an alternative address then that is
> replaced instead.
>
> All callers have a tidy u64 already so this also consolidates the repeated
> low/high code into a small helper.
Now I'm really confused. Something like:
genirq/msi: Refactor iommu_dma_compose_msi_msg()
The call sites of iommu_dma_compose_msi_msg() have the following
pattern:
1) Set the MSI message address to the non-translated address
2) Invoke iommu_dma_compose_msi_msg() to apply IOVA translation if
available.
Rework and rename iommu_dma_compose_msi_msg() to handles both
address set up variants in one consolidated helper.
Or something to that effect.
> -/**
> - * iommu_dma_compose_msi_msg() - Apply translation to an MSI message
> - * @desc: MSI descriptor prepared by iommu_dma_prepare_msi()
> - * @msg: MSI message containing target physical address
> - */
Please keep and rework the documentation comment.
> -static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc,
> - struct msi_msg *msg)
> +static inline void msi_msg_set_addr(struct msi_desc *desc, struct msi_msg *msg,
> + u64 msi_addr)
No line break required. You have 100 characters available.
> {
> #ifdef CONFIG_IRQ_MSI_IOMMU
> if (desc->iommu_msi_page_shift) {
> @@ -314,11 +309,14 @@ static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc,
> << desc->iommu_msi_page_shift;
>
> msg->address_hi = upper_32_bits(msi_iova);
> - msg->address_lo = lower_32_bits(msi_iova) |
> - (msg->address_lo &
> - ((1 << desc->iommu_msi_page_shift) - 1));
> + msg->address_lo =
> + lower_32_bits(msi_iova) |
> + (msi_addr & ((1 << desc->iommu_msi_page_shift) - 1));
Please avoid unrelated random formatting changes. Especially in this
case this is even more non-sensical as you introduced the original
formatting in the previous patch. So fix it up there and make it:
msg->address_lo = lower_32_bits(msi_iova) |
(msg->address_lo & ((1 << desc->iommu_msi_page_shift) - 1));
which is way more readable than this displaced variant above.
> + return;
>
> - iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg);
> + msg->data = its_get_event_id(d);
> + msi_msg_set_addr(irq_data_get_msi_desc(d), msg,
> + its_dev->its->get_msi_base(its_dev));
No line break required here and at the other places.
Thanks,
tglx
next prev parent reply other threads:[~2025-02-13 12:13 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-08 9:02 [PATCH v1 00/13] iommu: Add MSI mapping support with nested SMMU Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 01/13] genirq/msi: Store the IOMMU IOVA directly in msi_desc instead of iommu_cookie Nicolin Chen
2025-02-13 11:54 ` Thomas Gleixner
2025-02-13 13:57 ` Jason Gunthorpe
2025-02-13 21:34 ` Nicolin Chen
2025-02-13 20:28 ` Jacob Pan
2025-02-13 21:02 ` Nicolin Chen
2025-02-13 21:33 ` Jacob Pan
2025-02-08 9:02 ` [PATCH v1 02/13] genirq/msi: Rename iommu_dma_compose_msi_msg() to msi_msg_set_addr() Nicolin Chen
2025-02-13 12:11 ` Thomas Gleixner [this message]
2025-02-13 14:37 ` Jason Gunthorpe
2025-02-08 9:02 ` [PATCH v1 03/13] iommu: Make iommu_dma_prepare_msi() into a generic operation Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 04/13] irqchip: Have CONFIG_IRQ_MSI_IOMMU be selected by the irqchips that need it Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 05/13] iommu: Turn fault_data to iommufd private pointer Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 06/13] iommufd: Implement sw_msi support natively Nicolin Chen
2025-02-11 18:16 ` Jason Gunthorpe
2025-02-11 19:04 ` Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 07/13] iommu: Turn iova_cookie to dma-iommu private pointer Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 08/13] iommufd/device: Move sw_msi_start from igroup to idev Nicolin Chen
2025-02-09 18:41 ` Jason Gunthorpe
2025-02-10 23:25 ` Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 09/13] iommufd: Pass in idev to iopt_table_enforce_dev_resv_regions Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 10/13] iommufd: Add IOMMU_OPTION_SW_MSI_START/SIZE ioctls Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 11/13] iommufd/selftest: Add MOCK_FLAGS_DEVICE_NO_ATTACH Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 12/13] iommufd/selftest: Add a testing reserved region Nicolin Chen
2025-02-08 9:02 ` [PATCH v1 13/13] iommufd/selftest: Add coverage for IOMMU_OPTION_SW_MSI_START/SIZE Nicolin Chen
2025-02-19 13:37 ` [PATCH v1 00/13] iommu: Add MSI mapping support with nested SMMU Jason Gunthorpe
2025-02-19 16:06 ` Nicolin Chen
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