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Tue, 02 Mar 2021 11:32:31 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BE37864F11; Tue, 2 Mar 2021 11:32:14 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lH3G8-00Gghx-Co; Tue, 02 Mar 2021 11:32:12 +0000 Date: Tue, 02 Mar 2021 11:32:11 +0000 Message-ID: <87v9a9zt8k.wl-maz@kernel.org> From: Marc Zyngier To: Claudiu Beznea Subject: Re: [PATCH 1/2] dt-bindings: mchp-eic: add bindings In-Reply-To: <20210302102846.619980-2-claudiu.beznea@microchip.com> References: <20210302102846.619980-1-claudiu.beznea@microchip.com> <20210302102846.619980-2-claudiu.beznea@microchip.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: claudiu.beznea@microchip.com, tglx@linutronix.de, robh+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, nicolas.ferre@microchip.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210302_113231_576427_C054EE0C X-CRM114-Status: GOOD ( 20.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 02 Mar 2021 10:28:45 +0000, Claudiu Beznea wrote: > > Add DT bindings for Microchip External Interrupt Controller. > > Signed-off-by: Claudiu Beznea > --- > .../interrupt-controller/mchp,eic.yaml | 74 +++++++++++++++++++ > 1 file changed, 74 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml b/Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml > new file mode 100644 > index 000000000000..5a927817aa7d > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml > @@ -0,0 +1,74 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/mchp,eic.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Microchip External Interrupt Controller > + > +maintainers: > + - Claudiu Beznea > + > +description: > + This interrupt controller is found in Microchip SoCs (SAMA7G5) and provides > + support for handling up to 2 external interrupt lines. > + > +properties: > + compatible: > + enum: > + - microchip,sama7g5-eic > + > + reg: > + maxItems: 1 > + > + interrupt-controller: true > + > + '#interrupt-cells': > + const: 3 > + description: > + The first cell is the input IRQ number (between 0 and 1), the second cell > + is the trigger type as defined in interrupt.txt present in this directory > + and the third cell is the glitch filter (1, 2, 4, 8) in clock cycles This last parameter looks like a very bad idea. How do you plan for that to be used? Which clock cycles? In any case, I don't think it should be part of the interrupt descriptor, but provided as a static configuration at the interrupt controller level itself. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel