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From: gregory.clement@bootlin.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] arm64: dts: marvell: add CP110 uart peripherals
Date: Wed, 14 Feb 2018 11:42:52 +0100	[thread overview]
Message-ID: <87vaezonrn.fsf@bootlin.com> (raw)
In-Reply-To: <03f1bec6e11c9f6fb9d5520c745eafca28597801.1517381798.git.baruch@tkos.co.il> (Baruch Siach's message of "Wed, 31 Jan 2018 08:56:37 +0200")

Hi Baruch,
 
 On mer., janv. 31 2018, Baruch Siach <baruch@tkos.co.il> wrote:

> The CP110 component has 4 uart peripherals. All of them use the same clock
> gate for slow peripherals that is shared with the i2c and spi peripherals.
>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>

Applied on mvebu/dt64

Thanks,

Gregory

> ---
> v2: No change
> ---
>  arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 40 +++++++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
> index a8af4136dbe7..a422cd981a0b 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
> @@ -290,6 +290,46 @@
>  			status = "disabled";
>  		};
>  
> +		CP110_LABEL(uart0): serial at 702000 {
> +			compatible = "snps,dw-apb-uart";
> +			reg = <0x702000 0x100>;
> +			reg-shift = <2>;
> +			interrupts = <ICU_GRP_NSR 122 IRQ_TYPE_LEVEL_HIGH>;
> +			reg-io-width = <1>;
> +			clocks = <&CP110_LABEL(clk) 1 21>;
> +			status = "disabled";
> +		};
> +
> +		CP110_LABEL(uart1): serial at 702100 {
> +			compatible = "snps,dw-apb-uart";
> +			reg = <0x702100 0x100>;
> +			reg-shift = <2>;
> +			interrupts = <ICU_GRP_NSR 123 IRQ_TYPE_LEVEL_HIGH>;
> +			reg-io-width = <1>;
> +			clocks = <&CP110_LABEL(clk) 1 21>;
> +			status = "disabled";
> +		};
> +
> +		CP110_LABEL(uart2): serial at 702200 {
> +			compatible = "snps,dw-apb-uart";
> +			reg = <0x702200 0x100>;
> +			reg-shift = <2>;
> +			interrupts = <ICU_GRP_NSR 124 IRQ_TYPE_LEVEL_HIGH>;
> +			reg-io-width = <1>;
> +			clocks = <&CP110_LABEL(clk) 1 21>;
> +			status = "disabled";
> +		};
> +
> +		CP110_LABEL(uart3): serial at 702300 {
> +			compatible = "snps,dw-apb-uart";
> +			reg = <0x702300 0x100>;
> +			reg-shift = <2>;
> +			interrupts = <ICU_GRP_NSR 125 IRQ_TYPE_LEVEL_HIGH>;
> +			reg-io-width = <1>;
> +			clocks = <&CP110_LABEL(clk) 1 21>;
> +			status = "disabled";
> +		};
> +
>  		CP110_LABEL(nand): nand at 720000 {
>  			/*
>  			* Due to the limitation of the pins available
> -- 
> 2.15.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
Gregory Clement, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com

  parent reply	other threads:[~2018-02-14 10:42 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-31  6:56 [PATCH v2 1/2] arm64: dts: marvell: add CP110 uart peripherals Baruch Siach
2018-01-31  6:56 ` [PATCH v2 2/2] arm64: dts: marvell: mcbin: enable uart headers Baruch Siach
2018-02-14 11:06   ` Gregory CLEMENT
2018-02-14 10:42 ` [PATCH v2 1/2] arm64: dts: marvell: add CP110 uart peripherals Gregory CLEMENT
2018-02-14 10:42 ` Gregory CLEMENT [this message]
2018-02-14 10:56   ` Baruch Siach
2018-02-14 11:07     ` Gregory CLEMENT
2018-02-14 11:07     ` Russell King - ARM Linux
2018-02-14 11:17       ` Baruch Siach
2018-02-14 11:30         ` Russell King - ARM Linux
2018-02-14 12:14           ` Gregory CLEMENT

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