* [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description
@ 2017-07-18 13:10 Thomas Petazzoni
2017-07-18 13:10 ` [PATCH 1/3] arm64: dts: marvell: use ICU for the CP110 slave RTC Thomas Petazzoni
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Thomas Petazzoni @ 2017-07-18 13:10 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
Here are a few updates to the CP110 DT description. The first one is
really a fix, the next two are just improvements.
Thanks!
Thomas
Thomas Petazzoni (3):
arm64: dts: marvell: use ICU for the CP110 slave RTC
arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description
arm64: dts: marvell: add description for SDHCI controller in CP110
slave
.../boot/dts/marvell/armada-cp110-master.dtsi | 14 ++++++-------
.../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 24 +++++++++++++++-------
2 files changed, 24 insertions(+), 14 deletions(-)
--
2.9.4
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/3] arm64: dts: marvell: use ICU for the CP110 slave RTC 2017-07-18 13:10 [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description Thomas Petazzoni @ 2017-07-18 13:10 ` Thomas Petazzoni 2017-07-18 13:34 ` Gregory CLEMENT 2017-07-18 13:10 ` [PATCH 2/3] arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description Thomas Petazzoni ` (2 subsequent siblings) 3 siblings, 1 reply; 8+ messages in thread From: Thomas Petazzoni @ 2017-07-18 13:10 UTC (permalink / raw) To: linux-arm-kernel When the conversion of the Marvell CP110 Device Tree description from using GIC interrupts to using ICU interrupts was done, the RTC on the slave CP110 was left unchanged. This commit fixes that, so that all devices on the CP properly get their interrupt through the ICU. Fixes: 6ef84a827c375 ("arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K") Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- There's no need for a Cc: stable, because the ICU conversion was merged in 4.13-rc1. --- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 8c08a64..67936f7 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -64,7 +64,7 @@ compatible = "marvell,armada-8k-rtc"; reg = <0x284000 0x20>, <0x284080 0x24>; reg-names = "rtc", "rtc-soc"; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; }; cps_ethernet: ethernet at 0 { -- 2.9.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/3] arm64: dts: marvell: use ICU for the CP110 slave RTC 2017-07-18 13:10 ` [PATCH 1/3] arm64: dts: marvell: use ICU for the CP110 slave RTC Thomas Petazzoni @ 2017-07-18 13:34 ` Gregory CLEMENT 0 siblings, 0 replies; 8+ messages in thread From: Gregory CLEMENT @ 2017-07-18 13:34 UTC (permalink / raw) To: linux-arm-kernel Hi Thomas, On mar., juil. 18 2017, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote: > When the conversion of the Marvell CP110 Device Tree description from > using GIC interrupts to using ICU interrupts was done, the RTC on the > slave CP110 was left unchanged. This commit fixes that, so that all > devices on the CP properly get their interrupt through the ICU. > > Fixes: 6ef84a827c375 ("arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K") > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Applied on mvebu/fixes Thanks, Gregory > --- > There's no need for a Cc: stable, because the ICU conversion was > merged in 4.13-rc1. > --- > arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > index 8c08a64..67936f7 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > @@ -64,7 +64,7 @@ > compatible = "marvell,armada-8k-rtc"; > reg = <0x284000 0x20>, <0x284080 0x24>; > reg-names = "rtc", "rtc-soc"; > - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; > + interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; > }; > > cps_ethernet: ethernet at 0 { > -- > 2.9.4 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/3] arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description 2017-07-18 13:10 [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description Thomas Petazzoni 2017-07-18 13:10 ` [PATCH 1/3] arm64: dts: marvell: use ICU for the CP110 slave RTC Thomas Petazzoni @ 2017-07-18 13:10 ` Thomas Petazzoni 2017-07-18 14:28 ` Gregory CLEMENT 2017-07-18 13:10 ` [PATCH 3/3] arm64: dts: marvell: add description for SDHCI controller in CP110 slave Thomas Petazzoni 2017-07-18 13:29 ` [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description Gregory CLEMENT 3 siblings, 1 reply; 8+ messages in thread From: Thomas Petazzoni @ 2017-07-18 13:10 UTC (permalink / raw) To: linux-arm-kernel In both the CP110 master and slave description, the node describing the RTC was at the wrong place when taking into account increasing register addresses. Interestingly, it was not even at the same (wrong) place in both files. This commit adjusts that, making the master and slave descriptions more aligned. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 14 +++++++------- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 14 +++++++------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index 1294d62..394e54d 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -115,6 +115,13 @@ msi-parent = <&gicp>; }; + cpm_rtc: rtc at 284000 { + compatible = "marvell,armada-8k-rtc"; + reg = <0x284000 0x20>, <0x284080 0x24>; + reg-names = "rtc", "rtc-soc"; + interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; + }; + cpm_syscon0: system-controller at 440000 { compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; @@ -155,13 +162,6 @@ }; }; - cpm_rtc: rtc at 284000 { - compatible = "marvell,armada-8k-rtc"; - reg = <0x284000 0x20>, <0x284080 0x24>; - reg-names = "rtc", "rtc-soc"; - interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; - }; - cpm_sata0: sata at 540000 { compatible = "marvell,armada-8k-ahci", "generic-ahci"; diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 67936f7..2e6422a 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -60,13 +60,6 @@ compatible = "simple-bus"; ranges = <0x0 0x0 0xf4000000 0x2000000>; - cps_rtc: rtc at 284000 { - compatible = "marvell,armada-8k-rtc"; - reg = <0x284000 0x20>, <0x284080 0x24>; - reg-names = "rtc", "rtc-soc"; - interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; - }; - cps_ethernet: ethernet at 0 { compatible = "marvell,armada-7k-pp22"; reg = <0x0 0x100000>, <0x129000 0xb000>; @@ -122,6 +115,13 @@ msi-parent = <&gicp>; }; + cps_rtc: rtc at 284000 { + compatible = "marvell,armada-8k-rtc"; + reg = <0x284000 0x20>, <0x284080 0x24>; + reg-names = "rtc", "rtc-soc"; + interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; + }; + cps_syscon0: system-controller at 440000 { compatible = "syscon", "simple-mfd"; reg = <0x440000 0x1000>; -- 2.9.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description 2017-07-18 13:10 ` [PATCH 2/3] arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description Thomas Petazzoni @ 2017-07-18 14:28 ` Gregory CLEMENT 0 siblings, 0 replies; 8+ messages in thread From: Gregory CLEMENT @ 2017-07-18 14:28 UTC (permalink / raw) To: linux-arm-kernel Hi Thomas, On mar., juil. 18 2017, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote: > In both the CP110 master and slave description, the node describing > the RTC was at the wrong place when taking into account increasing > register addresses. Interestingly, it was not even at the same (wrong) > place in both files. > > This commit adjusts that, making the master and slave descriptions > more aligned. > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Applied on mvebu/dt64 Thanks, Gregory > --- > arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 14 +++++++------- > arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 14 +++++++------- > 2 files changed, 14 insertions(+), 14 deletions(-) > > diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > index 1294d62..394e54d 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi > @@ -115,6 +115,13 @@ > msi-parent = <&gicp>; > }; > > + cpm_rtc: rtc at 284000 { > + compatible = "marvell,armada-8k-rtc"; > + reg = <0x284000 0x20>, <0x284080 0x24>; > + reg-names = "rtc", "rtc-soc"; > + interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > cpm_syscon0: system-controller at 440000 { > compatible = "syscon", "simple-mfd"; > reg = <0x440000 0x1000>; > @@ -155,13 +162,6 @@ > }; > }; > > - cpm_rtc: rtc at 284000 { > - compatible = "marvell,armada-8k-rtc"; > - reg = <0x284000 0x20>, <0x284080 0x24>; > - reg-names = "rtc", "rtc-soc"; > - interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > cpm_sata0: sata at 540000 { > compatible = "marvell,armada-8k-ahci", > "generic-ahci"; > diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > index 67936f7..2e6422a 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > @@ -60,13 +60,6 @@ > compatible = "simple-bus"; > ranges = <0x0 0x0 0xf4000000 0x2000000>; > > - cps_rtc: rtc at 284000 { > - compatible = "marvell,armada-8k-rtc"; > - reg = <0x284000 0x20>, <0x284080 0x24>; > - reg-names = "rtc", "rtc-soc"; > - interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > cps_ethernet: ethernet at 0 { > compatible = "marvell,armada-7k-pp22"; > reg = <0x0 0x100000>, <0x129000 0xb000>; > @@ -122,6 +115,13 @@ > msi-parent = <&gicp>; > }; > > + cps_rtc: rtc at 284000 { > + compatible = "marvell,armada-8k-rtc"; > + reg = <0x284000 0x20>, <0x284080 0x24>; > + reg-names = "rtc", "rtc-soc"; > + interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>; > + }; > + > cps_syscon0: system-controller at 440000 { > compatible = "syscon", "simple-mfd"; > reg = <0x440000 0x1000>; > -- > 2.9.4 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/3] arm64: dts: marvell: add description for SDHCI controller in CP110 slave 2017-07-18 13:10 [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description Thomas Petazzoni 2017-07-18 13:10 ` [PATCH 1/3] arm64: dts: marvell: use ICU for the CP110 slave RTC Thomas Petazzoni 2017-07-18 13:10 ` [PATCH 2/3] arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description Thomas Petazzoni @ 2017-07-18 13:10 ` Thomas Petazzoni 2017-07-18 13:49 ` Gregory CLEMENT 2017-07-18 13:29 ` [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description Gregory CLEMENT 3 siblings, 1 reply; 8+ messages in thread From: Thomas Petazzoni @ 2017-07-18 13:10 UTC (permalink / raw) To: linux-arm-kernel The two CP110 blocks present in the Armada 8K are identical, so since there is an SDHCI controller described in the master CP110 description, it should also be described in the slave CP110. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 2e6422a..ef95718 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -258,6 +258,16 @@ status = "okay"; }; + cps_sdhci0: sdhci at 780000 { + compatible = "marvell,armada-cp110-sdhci"; + reg = <0x780000 0x300>; + interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "core"; + clocks = <&cps_clk 1 4>; + dma-coherent; + status = "disabled"; + }; + cps_crypto: crypto at 800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; -- 2.9.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] arm64: dts: marvell: add description for SDHCI controller in CP110 slave 2017-07-18 13:10 ` [PATCH 3/3] arm64: dts: marvell: add description for SDHCI controller in CP110 slave Thomas Petazzoni @ 2017-07-18 13:49 ` Gregory CLEMENT 0 siblings, 0 replies; 8+ messages in thread From: Gregory CLEMENT @ 2017-07-18 13:49 UTC (permalink / raw) To: linux-arm-kernel Hi Thomas, On mar., juil. 18 2017, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote: > The two CP110 blocks present in the Armada 8K are identical, so since > there is an SDHCI controller described in the master CP110 > description, it should also be described in the slave CP110. Actually they are not totally identically and there is no SD/eMMC controller on the CP slave. Gregory > > Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> > --- > arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > index 2e6422a..ef95718 100644 > --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi > @@ -258,6 +258,16 @@ > status = "okay"; > }; > > + cps_sdhci0: sdhci at 780000 { > + compatible = "marvell,armada-cp110-sdhci"; > + reg = <0x780000 0x300>; > + interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "core"; > + clocks = <&cps_clk 1 4>; > + dma-coherent; > + status = "disabled"; > + }; > + > cps_crypto: crypto at 800000 { > compatible = "inside-secure,safexcel-eip197"; > reg = <0x800000 0x200000>; > -- > 2.9.4 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description 2017-07-18 13:10 [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description Thomas Petazzoni ` (2 preceding siblings ...) 2017-07-18 13:10 ` [PATCH 3/3] arm64: dts: marvell: add description for SDHCI controller in CP110 slave Thomas Petazzoni @ 2017-07-18 13:29 ` Gregory CLEMENT 3 siblings, 0 replies; 8+ messages in thread From: Gregory CLEMENT @ 2017-07-18 13:29 UTC (permalink / raw) To: linux-arm-kernel Hi Thomas, On mar., juil. 18 2017, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote: > Hello, > > Here are a few updates to the CP110 DT description. The first one is > really a fix, the next two are just improvements. I was writig the same series and I alreadu sent the same 1st patch! I will apply your version Thanks, Gregory > > Thanks! > > Thomas > > Thomas Petazzoni (3): > arm64: dts: marvell: use ICU for the CP110 slave RTC > arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description > arm64: dts: marvell: add description for SDHCI controller in CP110 > slave > > .../boot/dts/marvell/armada-cp110-master.dtsi | 14 ++++++------- > .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 24 +++++++++++++++------- > 2 files changed, 24 insertions(+), 14 deletions(-) > > -- > 2.9.4 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-07-18 14:28 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-07-18 13:10 [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description Thomas Petazzoni 2017-07-18 13:10 ` [PATCH 1/3] arm64: dts: marvell: use ICU for the CP110 slave RTC Thomas Petazzoni 2017-07-18 13:34 ` Gregory CLEMENT 2017-07-18 13:10 ` [PATCH 2/3] arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description Thomas Petazzoni 2017-07-18 14:28 ` Gregory CLEMENT 2017-07-18 13:10 ` [PATCH 3/3] arm64: dts: marvell: add description for SDHCI controller in CP110 slave Thomas Petazzoni 2017-07-18 13:49 ` Gregory CLEMENT 2017-07-18 13:29 ` [PATCH 0/3] Misc updates for Armada 7K/8K CP110 DT description Gregory CLEMENT
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