From: Marc Zyngier <maz@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Zhou Wang <wangzhou1@hisilicon.com>
Subject: Re: [PATCH] irqchip/gic-v4: Fix ordering between vmapp and vpe locks
Date: Sun, 28 Jul 2024 10:42:32 +0100 [thread overview]
Message-ID: <87y15l4zuf.wl-maz@kernel.org> (raw)
In-Reply-To: <875xsrvpt3.ffs@tglx>
On Fri, 26 Jul 2024 21:52:40 +0100,
Thomas Gleixner <tglx@linutronix.de> wrote:
>
> On Tue, Jul 23 2024 at 18:52, Marc Zyngier wrote:
> > @@ -3808,7 +3802,7 @@ static int its_vpe_set_affinity(struct irq_data *d,
> > struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
> > unsigned int from, cpu = nr_cpu_ids;
> > struct cpumask *table_mask;
> > - unsigned long flags;
> > + unsigned long flags, vmapp_flags;
>
> What's this flags business for? its_vpe_set_affinity() is called with
> interrupts disabled, no?
Duh. Of course. Cargo-culted braindead logic. I'll fix that.
>
> > /*
> > * Changing affinity is mega expensive, so let's be as lazy as
> > @@ -3822,7 +3816,14 @@ static int its_vpe_set_affinity(struct irq_data *d,
> > * protect us, and that we must ensure nobody samples vpe->col_idx
> > * during the update, hence the lock below which must also be
> > * taken on any vLPI handling path that evaluates vpe->col_idx.
> > + *
> > + * Finally, we must protect ourselves against concurrent
> > + * updates of the mapping state on this VM should the ITS list
> > + * be in use.
> > */
> > + if (its_list_map)
> > + raw_spin_lock_irqsave(&vpe->its_vm->vmapp_lock, vmapp_flags);
>
> Confused. This changes the locking from unconditional to
> conditional. What's the rationale here?
I think I'm confused too. I've written this as a mix of the VMOVP lock
(which must be conditional) and the new VMAPP lock, which must be
taken to avoid racing against a new vcpu coming up. And of course,
this makes zero sense.
I'll get some sleep first, and then fix this correctly. Thanks for
spotting it.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2024-07-28 9:43 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-23 17:52 [PATCH] irqchip/gic-v4: Fix ordering between vmapp and vpe locks Marc Zyngier
2024-07-24 1:26 ` Zhou Wang
2024-07-26 20:52 ` Thomas Gleixner
2024-07-28 9:42 ` Marc Zyngier [this message]
2024-07-29 7:25 ` Marc Zyngier
2024-07-29 9:48 ` Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87y15l4zuf.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=tglx@linutronix.de \
--cc=wangzhou1@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).