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From: Marc Zyngier <maz@kernel.org>
To: Jing Zhang <jingzhangos@google.com>
Cc: KVM <kvm@vger.kernel.org>, KVMARM <kvmarm@lists.linux.dev>,
	ARMLinux <linux-arm-kernel@lists.infradead.org>,
	Oliver Upton <oupton@google.com>, Will Deacon <will@kernel.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Fuad Tabba <tabba@google.com>, Reiji Watanabe <reijiw@google.com>,
	Ricardo Koller <ricarkol@google.com>,
	Raghavendra Rao Ananta <rananta@google.com>
Subject: Re: [PATCH v4 2/6] KVM: arm64: Save ID registers' sanitized value per guest
Date: Tue, 28 Mar 2023 20:22:09 +0100	[thread overview]
Message-ID: <87y1ngr89q.wl-maz@kernel.org> (raw)
In-Reply-To: <CAAdAUtjp1tdyadjtU0RrdsRq-D3518G8eqP_coYNJ1vFEvrz2Q@mail.gmail.com>

On Tue, 28 Mar 2023 18:36:58 +0100,
Jing Zhang <jingzhangos@google.com> wrote:
> 
> Hi Marc,

[...]

> IIUC, usually we don't need a specific locking to update idregs here.
> All idregs are 64 bit and can be read/written atomically. The only
> case that may need a locking is to keep the consistency for PMUVer in
> AA64DFR0_EL1 and PerfMon in DFR0_EL1. If there is no use case for two
> VCPU threads in a VM to update PMUVer and PerfMon concurrently, then
> we don't need the locking as in later patch by using the kvm lock.
> WDTY?

I think we generally need locking for any writable id-reg, the goal
being that they will ultimately *all* be writable. As you found out,
there is this need for the PMU fields, and I'm willing to bet that
there will be more of those.

And given that the locking you have used in some of the later patches
violates the locking order (don't worry, you're not alone!), we need
to use something else. Which is where Oliver's series comes into play.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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  reply	other threads:[~2023-03-28 19:23 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-17  5:06 [PATCH v4 0/6] Support writable CPU ID registers from userspace Jing Zhang
2023-03-17  5:06 ` [PATCH v4 1/6] KVM: arm64: Move CPU ID feature registers emulation into a separate file Jing Zhang
2023-03-27 10:14   ` Marc Zyngier
2023-03-28 17:16     ` Jing Zhang
2023-03-17  5:06 ` [PATCH v4 2/6] KVM: arm64: Save ID registers' sanitized value per guest Jing Zhang
2023-03-27 10:15   ` Marc Zyngier
2023-03-28 17:36     ` Jing Zhang
2023-03-28 19:22       ` Marc Zyngier [this message]
2023-03-28 20:05         ` Jing Zhang
2023-03-29 16:26       ` Reiji Watanabe
2023-03-17  5:06 ` [PATCH v4 3/6] KVM: arm64: Use per guest ID register for ID_AA64PFR0_EL1.[CSV2|CSV3] Jing Zhang
2023-03-27 10:31   ` Marc Zyngier
2023-03-28 19:54     ` Jing Zhang
2023-03-28 12:39   ` Fuad Tabba
2023-03-28 20:01     ` Jing Zhang
2023-03-29  8:23       ` Fuad Tabba
2023-03-17  5:06 ` [PATCH v4 4/6] KVM: arm64: Use per guest ID register for ID_AA64DFR0_EL1.PMUVer Jing Zhang
2023-03-27 10:40   ` Marc Zyngier
2023-03-28 20:20     ` Jing Zhang
2023-03-17  5:06 ` [PATCH v4 5/6] KVM: arm64: Introduce ID register specific descriptor Jing Zhang
2023-03-27 11:28   ` Marc Zyngier
2023-03-29  3:46     ` Jing Zhang
2023-03-17  5:06 ` [PATCH v4 6/6] KVM: arm64: Refactor writings for PMUVer/CSV2/CSV3 Jing Zhang
2023-03-27 13:34   ` Marc Zyngier
2023-03-29  4:29     ` Jing Zhang

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