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Sun, 12 Mar 2023 15:01:07 +0000 Date: Sun, 12 Mar 2023 15:01:06 +0000 Message-ID: <87y1o23tfx.wl-maz@kernel.org> From: Marc Zyngier To: Reiji Watanabe Cc: Oliver Upton , kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Zenghui Yu , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , Will Deacon Subject: Re: [PATCH 2/2] KVM: arm64: PMU: Don't save PMCR_EL0.{C,P} for the vCPU In-Reply-To: <20230302055033.3081456-3-reijiw@google.com> References: <20230302055033.3081456-1-reijiw@google.com> <20230302055033.3081456-3-reijiw@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: reijiw@google.com, oliver.upton@linux.dev, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, alexandru.elisei@arm.com, yuzenghui@huawei.com, suzuki.poulose@arm.com, pbonzini@redhat.com, ricarkol@google.com, jingzhangos@google.com, rananta@google.com, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230312_080111_393325_71FF8EF5 X-CRM114-Status: GOOD ( 23.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 02 Mar 2023 05:50:33 +0000, Reiji Watanabe wrote: > > Presently, when a guest writes 1 to PMCR_EL0.{C,P}, which is WO/RAZ, > KVM saves the register value, including these bits. > When userspace reads the register using KVM_GET_ONE_REG, KVM returns > the saved register value as it is (the saved value might have these > bits set). This could result in userspace setting these bits on the > destination during migration. Consequently, KVM may end up resetting > the vPMU counter registers (PMCCNTR_EL0 and/or PMEVCNTR_EL0) to > zero on the first KVM_RUN after migration. > > Fix this by not saving those bits when a guest writes 1 to those bits. > > Signed-off-by: Reiji Watanabe > --- > arch/arm64/kvm/pmu-emul.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c > index 24908400e190..a5a0a9811ddb 100644 > --- a/arch/arm64/kvm/pmu-emul.c > +++ b/arch/arm64/kvm/pmu-emul.c > @@ -538,7 +538,9 @@ void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) > if (!kvm_pmu_is_3p5(vcpu)) > val &= ~ARMV8_PMU_PMCR_LP; > > - __vcpu_sys_reg(vcpu, PMCR_EL0) = val; > + /* The reset bits don't indicate any state, and shouldn't be saved. */ > + __vcpu_sys_reg(vcpu, PMCR_EL0) = > + val & ~(ARMV8_PMU_PMCR_C | ARMV8_PMU_PMCR_P); nit: assignment on a single line, please. With that, Reviewed-by: Marc Zyngier Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel