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Thu, 27 Jan 2022 12:42:43 +0000 Date: Thu, 27 Jan 2022 12:42:42 +0000 Message-ID: <87y2315ozh.wl-maz@kernel.org> From: Marc Zyngier To: Chase Conklin Cc: alexandru.elisei@arm.com, andre.przywara@arm.com, christoffer.dall@arm.com, gankulkarni@os.amperecomputing.com, haibo.xu@linaro.org, james.morse@arm.com, jintack@cs.columbia.edu, kernel-team@android.com, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com Subject: Re: [PATCH v5 08/69] KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set In-Reply-To: <20220107215401.61828-1-chase.conklin@arm.com> References: <20211129200150.351436-9-maz@kernel.org> <20220107215401.61828-1-chase.conklin@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: chase.conklin@arm.com, alexandru.elisei@arm.com, andre.przywara@arm.com, christoffer.dall@arm.com, gankulkarni@os.amperecomputing.com, haibo.xu@linaro.org, james.morse@arm.com, jintack@cs.columbia.edu, kernel-team@android.com, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, suzuki.poulose@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_044247_211104_DB5569BE X-CRM114-Status: GOOD ( 31.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 07 Jan 2022 21:54:01 +0000, Chase Conklin wrote: > > Hi Marc, > > On Mon Nov 29 15:00:49 EST 2021, Marc Zyngier wrote: > > From: Christoffer Dall > > > > Reset the VCPU with PSTATE.M = EL2h when the nested virtualization > > feature is enabled on the VCPU. > > > > Signed-off-by: Christoffer Dall > > [maz: rework register reset not to use empty data structures] > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/reset.c | 10 ++++++++-- > > 1 file changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c > > index 426bd7fbc3fd..38a7182819fb 100644 > > --- a/arch/arm64/kvm/reset.c > > +++ b/arch/arm64/kvm/reset.c > > @@ -27,6 +27,7 @@ > > #include > > #include > > #include > > +#include > > #include > > > > /* Maximum phys_shift supported for any VM on this host */ > > @@ -38,6 +39,9 @@ static u32 kvm_ipa_limit; > > #define VCPU_RESET_PSTATE_EL1 (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT | \ > > PSR_F_BIT | PSR_D_BIT) > > > > +#define VCPU_RESET_PSTATE_EL2 (PSR_MODE_EL2h | PSR_A_BIT | PSR_I_BIT | \ > > + PSR_F_BIT | PSR_D_BIT) > > + > > #define VCPU_RESET_PSTATE_SVC (PSR_AA32_MODE_SVC | PSR_AA32_A_BIT | \ > > PSR_AA32_I_BIT | PSR_AA32_F_BIT) > > > > @@ -176,8 +180,8 @@ static bool vcpu_allowed_register_width(struct kvm_vcpu *vcpu) > > if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) && is32bit) > > return false; > > > > - /* MTE is incompatible with AArch32 */ > > - if (kvm_has_mte(vcpu->kvm) && is32bit) > > + /* MTE and NV are incompatible with AArch32 */ > > + if ((kvm_has_mte(vcpu->kvm) || nested_virt_in_use(vcpu)) && is32bit) > > return false; > > Should something similar be done for SVE? I see from the ID register emulation > that SVE is hidden from the guest but there isn't anything in > kvm_vcpu_enable_sve() that checks if NV is in use. That means it's possible to > have both nested_virt_in_use(vcpu) and vcpu_has_sve(vcpu) be true > simultaneously. If that happens, the FPSIMD fixup can get confused > > /* > * Don't handle SVE traps for non-SVE vcpus here. This > * includes NV guests for the time being. > */ > if (!sve_guest && (esr_ec != ESR_ELx_EC_FP_ASIMD || > guest_hyp_fpsimd_traps_enabled(vcpu))) > return false; > > and incorrectly restore the wrong context instead of forwarding a > FPSIMD trap to the guest hypervisor. Yes, nice catch. I have added this to kvm_reset_vcpu() to prevent the issue. if (nested_virt_in_use(vcpu) && vcpu_has_feature(vcpu, KVM_ARM_VCPU_SVE)) { ret = -EINVAL; goto out; } I may also rename nested_virt_in_use() to vcpu_has_nv(), which would fit the rest of the code a bit better. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel