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Thu, 12 Aug 2021 14:45:33 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mEBxY-00ATnR-PO for linux-arm-kernel@lists.infradead.org; Thu, 12 Aug 2021 14:45:30 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9CA6C610A4; Thu, 12 Aug 2021 14:45:27 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mEBxV-004ZhH-KC; Thu, 12 Aug 2021 15:45:25 +0100 Date: Thu, 12 Aug 2021 15:45:25 +0100 Message-ID: <87y29690xm.wl-maz@kernel.org> From: Marc Zyngier To: Valentin Schneider Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Gleixner , Lorenzo Pieralisi , Vincenzo Frascino Subject: Re: [PATCH v3 02/13] genirq: Define ack_irq() and eoi_irq() helpers In-Reply-To: <877dgq9450.mognet@arm.com> References: <20210629125010.458872-1-valentin.schneider@arm.com> <20210629125010.458872-3-valentin.schneider@arm.com> <87a6ln9k7i.wl-maz@kernel.org> <877dgq9450.mognet@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: valentin.schneider@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tglx@linutronix.de, lorenzo.pieralisi@arm.com, vincenzo.frascino@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210812_074528_888951_9C990F39 X-CRM114-Status: GOOD ( 27.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 12 Aug 2021 14:36:11 +0100, Valentin Schneider wrote: > > On 12/08/21 08:49, Marc Zyngier wrote: > > On Tue, 29 Jun 2021 13:49:59 +0100, > > Valentin Schneider wrote: > >> +void eoi_irq(struct irq_desc *desc) > >> +{ > >> + desc->irq_data.chip->irq_eoi(&desc->irq_data); > >> + > >> + if (desc->irq_data.chip->flags & IRQCHIP_AUTOMASKS_FLOW) > >> + irq_state_clr_flow_masked(desc); > > > > I just realised that this has a good chance to result in a mess with > > KVM, and specially the way we let the vGIC deactivate an interrupt > > directly from the guest, without any SW intervention (the magic HW bit > > in the LRs). > > > > I didn't think to consider those. It can't ever be simple, can it... > > > With this, interrupts routed to a guest (such as the timers) will > > always have the IRQD_IRQ_FLOW_MASKED flag set, which will never be > > cleared. > > > > I wonder whether this have a chance to interact badly with > > mask/unmask, or with the rest of the flow... > > > > Isn't it the other way around? That is, eoi_irq() will clear > IRQD_IRQ_FLOW_MASKED regardless of what happens within chip->irq_eoi(), > so we would end up with !IRQD_IRQ_FLOW_MASKED even if the (physical) IRQ > remains Active (irqd_is_forwarded_to_vcpu() case). Ah, I missed (again) that we always clear the flag, no matter what. > This does not entirely match reality (if the IRQ is still Active then it is > still "flow-masked"), but AFAICT this doesn't impact our handling of > forwarded IRQs: IRQD_IRQ_FLOW_MASKED is only really relevant from ack_irq() > to eoi_irq(), and deactivation-from-the-guest (propagated via LR.HW=1) > happens after that. Right. So we can have an active interrupt that is not flow-masked. That's counter-intuitive, but that's the GIC architecture for you... I'll take the series for a ride in -next. If anything breaks, we should know pretty soon. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel