From: alex.bennee@linaro.org (Alex Bennée)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 09/27] arm64/sve: Signal frame and context structure definition
Date: Tue, 22 Aug 2017 11:22:44 +0100 [thread overview]
Message-ID: <87y3qb52ez.fsf@linaro.org> (raw)
In-Reply-To: <1502280338-23002-10-git-send-email-Dave.Martin@arm.com>
Dave Martin <Dave.Martin@arm.com> writes:
> This patch defines the representation that will be used for the SVE
> register state in the signal frame, and implements support for
> saving and restoring the SVE registers around signals.
>
> The same layout will also be used for the in-kernel task state.
>
> Due to the variability of the SVE vector length, it is not possible
> to define a fixed C struct to describe all the registers. Instead,
> Macros are defined in sigcontext.h to facilitate access to the
> parts of the structure.
>
> Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> ---
> arch/arm64/include/uapi/asm/sigcontext.h | 113 ++++++++++++++++++++++++++++++-
> 1 file changed, 112 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/uapi/asm/sigcontext.h b/arch/arm64/include/uapi/asm/sigcontext.h
> index f0a76b9..0533bdf 100644
> --- a/arch/arm64/include/uapi/asm/sigcontext.h
> +++ b/arch/arm64/include/uapi/asm/sigcontext.h
> @@ -16,6 +16,8 @@
> #ifndef _UAPI__ASM_SIGCONTEXT_H
> #define _UAPI__ASM_SIGCONTEXT_H
>
> +#ifndef __ASSEMBLY__
> +
> #include <linux/types.h>
>
> /*
> @@ -41,10 +43,11 @@ struct sigcontext {
> *
> * 0x210 fpsimd_context
> * 0x10 esr_context
> + * 0x8a0 sve_context (vl <= 64) (optional)
> * 0x20 extra_context (optional)
> * 0x10 terminator (null _aarch64_ctx)
> *
> - * 0xdb0 (reserved for future allocation)
> + * 0x510 (reserved for future allocation)
> *
> * New records that can exceed this space need to be opt-in for userspace, so
> * that an expanded signal frame is not generated unexpectedly. The mechanism
> @@ -116,4 +119,112 @@ struct extra_context {
> __u32 __reserved[3];
> };
>
> +#define SVE_MAGIC 0x53564501
> +
> +struct sve_context {
> + struct _aarch64_ctx head;
> + __u16 vl;
> + __u16 __reserved[3];
> +};
> +
> +#endif /* !__ASSEMBLY__ */
> +
> +/*
> + * The SVE architecture leaves space for future expansion of the
> + * vector length beyond its initial architectural limit of 2048 bits
> + * (16 quadwords).
> + */
> +#define SVE_VQ_MIN 1
> +#define SVE_VQ_MAX 0x200
> +
> +#define SVE_VL_MIN (SVE_VQ_MIN * 0x10)
> +#define SVE_VL_MAX (SVE_VQ_MAX * 0x10)
> +
> +#define SVE_NUM_ZREGS 32
> +#define SVE_NUM_PREGS 16
> +
> +#define sve_vl_valid(vl) \
> + ((vl) % 0x10 == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
> +#define sve_vq_from_vl(vl) ((vl) / 0x10)
> +#define sve_vl_from_vq(vq) ((vq) * 0x10)
I got a little confused first time through over what VQ and VL where.
Maybe it would make sense to expand a little more from first principles?
/*
* The SVE architecture defines vector registers as a multiple of 128
* bit quadwords. The current architectural limit is 2048 bits (16
* quadwords) but there is room for future expansion beyond that.
*/
#define SVE_VQ_BITS 128 /* 128 bits in one quadword */
#define SVE_VQ_BYTES (SVE_VQ_BITS / 8)
#define SVE_VQ_MIN 1
#define SVE_VQ_MAX 0x200 /* see ZCR_ELx[8:0] */
#define SVE_VL_MIN_BYTES (SVE_VQ_MIN * SVE_VQ_BYTES)
#define SVE_VL_MAX_BYTES (SVE_VQ_MAX * SVE_VQ_BYTES)
#define SVE_NUM_ZREGS 32
#define SVE_NUM_PREGS 16
#define sve_vl_valid(vl) \
((vl) % SVE_VQ_BYTES == 0 && (vl) >= SVE_VL_MIN && (vl) <= SVE_VL_MAX)
#define sve_vq_from_vl(vl) ((vl) / SVE_VQ_BYTES)
#define sve_vl_from_vq(vq) ((vq) * SVE_VQ_BYTES)
> +
> +/*
> + * If the SVE registers are currently live for the thread at signal delivery,
> + * sve_context.head.size >=
> + * SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl))
> + * and the register data may be accessed using the SVE_SIG_*() macros.
> + *
> + * If sve_context.head.size <
> + * SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve_context.vl)),
> + * the SVE registers were not live for the thread and no register data
> + * is included: in this case, the SVE_SIG_*() macros should not be
> + * used except for this check.
> + *
> + * The same convention applies when returning from a signal: a caller
> + * will need to remove or resize the sve_context block if it wants to
> + * make the SVE registers live when they were previously non-live or
> + * vice-versa. This may require the the caller to allocate fresh
> + * memory and/or move other context blocks in the signal frame.
> + *
> + * Changing the vector length during signal return is not permitted:
> + * sve_context.vl must equal the thread's current vector length when
> + * doing a sigreturn.
> + *
> + *
> + * Note: for all these macros, the "vq" argument denotes the SVE
> + * vector length in quadwords (i.e., units of 128 bits).
> + *
> + * The correct way to obtain vq is to use sve_vq_from_vl(vl). The
> + * result is valid if and only if sve_vl_valid(vl) is true. This is
> + * guaranteed for a struct sve_context written by the kernel.
> + *
> + *
> + * Additional macros describe the contents and layout of the payload.
> + * For each, SVE_SIG_x_OFFSET(args) is the start offset relative to
> + * the start of struct sve_context, and SVE_SIG_x_SIZE(args) is the
> + * size in bytes:
> + *
> + * x type description
> + * - ---- -----------
> + * REGS the entire SVE context
> + *
> + * ZREGS __uint128_t[SVE_NUM_ZREGS][vq] all Z-registers
> + * ZREG __uint128_t[vq] individual Z-register Zn
> + *
> + * PREGS uint16_t[SVE_NUM_PREGS][vq] all P-registers
> + * PREG uint16_t[vq] individual P-register Pn
> + *
> + * FFR uint16_t[vq] first-fault status register
> + *
> + * Additional data might be appended in the future.
> + */
> +
> +#define SVE_SIG_ZREG_SIZE(vq) ((__u32)(vq) * 16)
> +#define SVE_SIG_PREG_SIZE(vq) ((__u32)(vq) * 2)
> +#define SVE_SIG_FFR_SIZE(vq) SVE_SIG_PREG_SIZE(vq)
> +
> +#define SVE_SIG_REGS_OFFSET ((sizeof(struct sve_context) + 15) / 16 * 16)
> +
> +#define SVE_SIG_ZREGS_OFFSET SVE_SIG_REGS_OFFSET
> +#define SVE_SIG_ZREG_OFFSET(vq, n) \
> + (SVE_SIG_ZREGS_OFFSET + SVE_SIG_ZREG_SIZE(vq) * (n))
> +#define SVE_SIG_ZREGS_SIZE(vq) \
> + (SVE_SIG_ZREG_OFFSET(vq, SVE_NUM_ZREGS) - SVE_SIG_ZREGS_OFFSET)
> +
> +#define SVE_SIG_PREGS_OFFSET(vq) \
> + (SVE_SIG_ZREGS_OFFSET + SVE_SIG_ZREGS_SIZE(vq))
> +#define SVE_SIG_PREG_OFFSET(vq, n) \
> + (SVE_SIG_PREGS_OFFSET(vq) + SVE_SIG_PREG_SIZE(vq) * (n))
> +#define SVE_SIG_PREGS_SIZE(vq) \
> + (SVE_SIG_PREG_OFFSET(vq, SVE_NUM_PREGS) - SVE_SIG_PREGS_OFFSET(vq))
> +
> +#define SVE_SIG_FFR_OFFSET(vq) \
> + (SVE_SIG_PREGS_OFFSET(vq) + SVE_SIG_PREGS_SIZE(vq))
> +
> +#define SVE_SIG_REGS_SIZE(vq) \
> + (SVE_SIG_FFR_OFFSET(vq) + SVE_SIG_FFR_SIZE(vq) - SVE_SIG_REGS_OFFSET)
> +
> +#define SVE_SIG_CONTEXT_SIZE(vq) (SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq))
> +
> +
> #endif /* _UAPI__ASM_SIGCONTEXT_H */
--
Alex Benn?e
next prev parent reply other threads:[~2017-08-22 10:22 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-09 12:05 [PATCH 00/27] ARM Scalable Vector Extension (SVE) Dave Martin
2017-08-09 12:05 ` [PATCH 01/27] regset: Add support for dynamically sized regsets Dave Martin
2017-08-18 11:52 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 02/27] arm64: KVM: Hide unsupported AArch64 CPU features from guests Dave Martin
2017-08-16 11:10 ` Marc Zyngier
2017-08-16 20:32 ` Dave Martin
2017-08-17 8:45 ` Marc Zyngier
2017-08-17 9:57 ` Dave Martin
2017-08-09 12:05 ` [PATCH 03/27] arm64: efi: Add missing Kconfig dependency on KERNEL_MODE_NEON Dave Martin
2017-08-18 12:02 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 04/27] arm64: Port deprecated instruction emulation to new sysctl interface Dave Martin
2017-08-18 12:09 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 05/27] arm64: fpsimd: Simplify uses of {set, clear}_ti_thread_flag() Dave Martin
2017-08-15 17:11 ` Ard Biesheuvel
2017-08-18 16:36 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 06/27] arm64/sve: System register and exception syndrome definitions Dave Martin
2017-08-21 9:33 ` Alex Bennée
2017-08-21 12:34 ` Alex Bennée
2017-08-21 14:26 ` Dave Martin
2017-08-21 14:50 ` Alex Bennée
2017-08-21 15:19 ` Dave Martin
2017-08-21 15:34 ` Alex Bennée
2017-08-21 13:56 ` Dave Martin
2017-08-21 14:36 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 07/27] arm64/sve: Low-level SVE architectural state manipulation functions Dave Martin
2017-08-21 10:11 ` Alex Bennée
2017-08-21 14:38 ` Dave Martin
2017-08-09 12:05 ` [PATCH 08/27] arm64/sve: Kconfig update and conditional compilation support Dave Martin
2017-08-21 10:12 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 09/27] arm64/sve: Signal frame and context structure definition Dave Martin
2017-08-22 10:22 ` Alex Bennée [this message]
2017-08-22 11:17 ` Dave Martin
2017-08-22 13:53 ` Alex Bennée
2017-08-22 14:21 ` Dave Martin
2017-08-22 15:03 ` Alex Bennée
2017-08-22 15:41 ` Dave Martin
2017-08-09 12:05 ` [PATCH 10/27] arm64/sve: Low-level CPU setup Dave Martin
2017-08-22 15:04 ` Alex Bennée
2017-08-22 15:33 ` Dave Martin
2017-08-09 12:05 ` [PATCH 11/27] arm64/sve: Core task context handling Dave Martin
2017-08-15 17:31 ` Ard Biesheuvel
2017-08-16 10:40 ` Dave Martin
2017-08-17 16:42 ` Dave Martin
2017-08-17 16:46 ` Ard Biesheuvel
2017-08-22 16:21 ` Alex Bennée
2017-08-22 17:19 ` Dave Martin
2017-08-22 18:39 ` Alex Bennée
2017-08-09 12:05 ` [PATCH 12/27] arm64/sve: Support vector length resetting for new processes Dave Martin
2017-08-22 16:22 ` Alex Bennée
2017-08-22 17:22 ` Dave Martin
2017-08-09 12:05 ` [PATCH 13/27] arm64/sve: Signal handling support Dave Martin
2017-08-23 9:38 ` Alex Bennée
2017-08-23 11:30 ` Dave Martin
2017-08-09 12:05 ` [PATCH 14/27] arm64/sve: Backend logic for setting the vector length Dave Martin
2017-08-23 15:33 ` Alex Bennée
2017-08-23 17:29 ` Dave Martin
2017-08-09 12:05 ` [PATCH 15/27] arm64/sve: Probe SVE capabilities and usable vector lengths Dave Martin
2017-08-16 17:48 ` Suzuki K Poulose
2017-08-17 10:04 ` Dave Martin
2017-08-17 10:46 ` Suzuki K Poulose
2017-08-09 12:05 ` [PATCH 16/27] arm64/sve: Preserve SVE registers around kernel-mode NEON use Dave Martin
2017-08-15 17:37 ` Ard Biesheuvel
2017-08-09 12:05 ` [PATCH 17/27] arm64/sve: Preserve SVE registers around EFI runtime service calls Dave Martin
2017-08-15 17:44 ` Ard Biesheuvel
2017-08-16 9:13 ` Dave Martin
2017-08-09 12:05 ` [PATCH 18/27] arm64/sve: ptrace and ELF coredump support Dave Martin
2017-08-09 12:05 ` [PATCH 19/27] arm64/sve: Add prctl controls for userspace vector length management Dave Martin
2017-08-09 12:05 ` [PATCH 20/27] arm64/sve: Add sysctl to set the default vector length for new processes Dave Martin
2017-08-09 12:05 ` [PATCH 21/27] arm64/sve: KVM: Prevent guests from using SVE Dave Martin
2017-08-15 16:33 ` Marc Zyngier
2017-08-16 10:50 ` Dave Martin
2017-08-16 11:20 ` Marc Zyngier
2017-08-16 11:22 ` Marc Zyngier
2017-08-16 11:35 ` Dave Martin
2017-08-09 12:05 ` [PATCH 22/27] arm64/sve: KVM: Treat guest SVE use as undefined instruction execution Dave Martin
2017-08-09 12:05 ` [PATCH 23/27] arm64/sve: KVM: Hide SVE from CPU features exposed to guests Dave Martin
2017-08-15 16:37 ` Marc Zyngier
2017-08-16 10:54 ` Dave Martin
2017-08-16 11:10 ` Marc Zyngier
2017-08-16 11:22 ` Dave Martin
2017-08-09 12:05 ` [PATCH 24/27] arm64/sve: Detect SVE and activate runtime support Dave Martin
2017-08-16 17:53 ` Suzuki K Poulose
2017-08-17 10:00 ` Dave Martin
2017-08-09 12:05 ` [PATCH 25/27] arm64/sve: Add documentation Dave Martin
2017-08-09 12:05 ` [RFC PATCH 26/27] arm64: signal: Report signal frame size to userspace via auxv Dave Martin
2017-08-09 12:05 ` [RFC PATCH 27/27] arm64/sve: signal: Include SVE when computing AT_MINSIGSTKSZ Dave Martin
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