From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9819DCA9EBD for ; Sun, 11 Oct 2026 15:07:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Subject:Cc:To:From:Message-ID:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=rPssMDMu2wzj+SLVMrrlq/wPuteu356OQ6siN0kIobM=; b=uW+mtV/AzRDfwIW0rM4nPS/yju zggL8Ne7w0W0lxMYz//N1kHMMc4QmZRl30KK2CZooTRaJcfilqYZoQntXhQSfQLTYQEH1rdOr9JXH FlrsUkwL7/KIGQVgxc7n+AFm98rA6haY/RXZi4qRTJiB6CVEHhxiLE+IyDDnsv4TcaDafh2J1EowY XCZqNYin1QTGhXubXiaOiP0gscRUwC6VdMj2aM0gJhJZxf5i6SLd0t5cUotkaBwB34sNf6+FfgLo3 sv0TQGDY24hHv4sjE8pVPwA2XE1bL/6Glo6/+ILw9OHB0FPv9d6AFaYIDA637rA1Dv+LppCPxY6bH YNpvCymA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xFv8v-00000009AnN-1qty; Sun, 11 Oct 2026 15:07:17 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1xFv8t-00000009AnH-492k for linux-arm-kernel@lists.infradead.org; Sun, 11 Oct 2026 15:07:16 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id D1885600E2; Sun, 11 Oct 2026 15:07:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7E9841F0089B; Sun, 11 Oct 2026 15:07:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1791731234; bh=rPssMDMu2wzj+SLVMrrlq/wPuteu356OQ6siN0kIobM=; h=Date:From:To:Cc:Subject:In-Reply-To:References; b=ATRUbMz+kTJCBgOaTXtgUoZIaRDwWP7rNf33Asa4LbCtGnsHo27BWHK4GzCwfjJPf ss0ebsvPMB5nBIV/tuYk0AOSzjC/f6Jd9mt8lrUVC2cAEBNQ2pwLix/Xfy7AbPaY6e MO4yHwoWuYgFtHkG8KdKk1nLBoeTNFcKXh0CISiJXzUAjUQFVH7u4TZ6wJuKJZsTcJ BB0yVrAKMeo0ZV0XHnjaFv2TgwC3dT8mCJfs9QgZzsXlBSPvWI0tStKmWmqlA3eEHU 3EXJNTCRsMM+X9iTarQAXTpw6FzkZArsxG9xMHUu1jjmMO6jEU5YCLhyrOjiL1nVAI mDYV1fmqxTBuA== Received: from sofa.misterjones.org ([185.219.108.64] helo=lobster-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1xFv8q-00000001aqI-2Uaa; Sun, 11 Oct 2026 15:07:12 +0000 Date: Sun, 11 Oct 2026 16:10:19 +0100 Message-ID: <87zewk8e90.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Cc: oupton@kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, seiden@linux.ibm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, mark.rutland@arm.com, vdonnefort@google.com, qperret@google.com, Sascha.Bischoff@arm.com, steven.price@arm.com, tabba@google.com Subject: Re: [PATCH v2 4/5] KVM: arm64: vgic: Do not access the GICv5 CPU interface from EL1 In-Reply-To: <20261011143648.211337-5-fuad.tabba@linux.dev> References: <20261011143648.211337-1-fuad.tabba@linux.dev> <20261011143648.211337-5-fuad.tabba@linux.dev> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: fuad.tabba@linux.dev, oupton@kernel.org, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, seiden@linux.ibm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, mark.rutland@arm.com, vdonnefort@google.com, qperret@google.com, Sascha.Bischoff@arm.com, steven.price@arm.com, tabba@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, 11 Oct 2026 15:36:47 +0100, Fuad Tabba wrote: > > can_access_vgic_from_kernel() excludes only the GICv3 system register > interface, so on a native GICv5 system without FEAT_GCIE_LEGACY it > returns true under nVHE. The kernel then saves and restores the CPU > interface from EL1, where ICH_VMCR_EL2 and the ICH_PPI_* registers are > UNDEFINED, so running a vCPU oopses the host. The nVHE world switch > already does that work at EL2. > > Require VHE for GICv5 as for GICv3. > > Fixes: 9b8e3d4ca0e73 ("KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore") > Reviewed-by: Sascha Bischoff > Signed-off-by: Fuad Tabba > --- > arch/arm64/kvm/vgic/vgic.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c > index b25303d9919fd..da72779d3b3ee 100644 > --- a/arch/arm64/kvm/vgic/vgic.c > +++ b/arch/arm64/kvm/vgic/vgic.c > @@ -1045,11 +1045,15 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) > static inline bool can_access_vgic_from_kernel(void) > { > /* > - * GICv2 can always be accessed from the kernel because it is > - * memory-mapped, and VHE systems can access GICv3 EL2 system > - * registers. > + * GICv3 and GICv5 drive the CPU interface through EL2 system > + * registers, so only VHE reaches them from the kernel. GICv2 is > + * memory-mapped and always reachable. > */ > - return !static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) || has_vhe(); > + if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) || > + kvm_vgic_global_state.type == VGIC_V5) > + return has_vhe(); > + > + return true; This really is perpetuating the wrong model. The rule is simple: anything that requires system instructions or system registers cannot be accessed from EL1, and therefore GICv2 is the only one that can be accessed from EL1. So the whole thing should read: return has_vhe() || kvm_vgic_global_state.type == VGIC_V2; Ultimately, we should static keys for all of the vgic types. M. -- Jazz isn't dead. It just smells funny.