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Mon, 29 May 2023 14:39:28 +0100 Date: Mon, 29 May 2023 14:39:28 +0100 Message-ID: <87zg5njlyn.wl-maz@kernel.org> From: Marc Zyngier To: Reiji Watanabe Cc: Oliver Upton , kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Zenghui Yu , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , Will Deacon Subject: Re: [PATCH 0/4] KVM: arm64: PMU: Fix PMUVer handling on heterogeneous PMU systems In-Reply-To: <20230527040236.1875860-1-reijiw@google.com> References: <20230527040236.1875860-1-reijiw@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: reijiw@google.com, oliver.upton@linux.dev, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, alexandru.elisei@arm.com, yuzenghui@huawei.com, suzuki.poulose@arm.com, pbonzini@redhat.com, ricarkol@google.com, jingzhangos@google.com, rananta@google.com, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230529_063932_692012_344A8DEA X-CRM114-Status: GOOD ( 21.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, 27 May 2023 05:02:32 +0100, Reiji Watanabe wrote: > > This series fixes issues with PMUVer handling for a guest with > PMU configured on heterogeneous PMU systems. > Specifically, it addresses the following two issues. > > [A] The default value of ID_AA64DFR0_EL1.PMUVer of the vCPU is set > to its sanitized value. This could be inappropriate on > heterogeneous PMU systems, as arm64_ftr_bits for PMUVer is defined > as FTR_EXACT with safe_val == 0 (when ID_AA64DFR0_EL1.PMUVer of all > PEs on the host is not uniform, the sanitized value will be 0). Why is this a problem? The CPUs don't implement the same version of the architecture, we don't get a PMU. Why should we try to do anything better? I really don't think we should go out or out way and make the code more complicated for something that doesn't really exist. Or am I missing the problem altogether? Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel