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Mon, 10 May 2021 08:00:04 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3C916613B6; Mon, 10 May 2021 08:00:02 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1lg0pc-000Jsp-4R; Mon, 10 May 2021 09:00:00 +0100 Date: Mon, 10 May 2021 08:59:59 +0100 Message-ID: <87zgx3nhmo.wl-maz@kernel.org> From: Marc Zyngier To: Zenghui Yu Cc: , , , , Will Deacon , James Morse , Julien Thierry , Suzuki K Poulose , Andrew Scull , Mark Rutland , Quentin Perret , David Brazdil Subject: Re: [PATCH v2 03/11] KVM: arm64: Make kvm_skip_instr() and co private to HYP In-Reply-To: <78e0bc84-4b38-9d93-39a1-473ed8c7265b@huawei.com> References: <20201102164045.264512-1-maz@kernel.org> <20201102164045.264512-4-maz@kernel.org> <875yzxnn5w.wl-maz@kernel.org> <87zgx8mkwd.wl-maz@kernel.org> <87o8doq6jy.wl-maz@kernel.org> <78e0bc84-4b38-9d93-39a1-473ed8c7265b@huawei.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: yuzenghui@huawei.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, kernel-team@android.com, will@kernel.org, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, ascull@google.com, mark.rutland@arm.com, qperret@google.com, dbrazdil@google.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210510_010002_966046_83B64A79 X-CRM114-Status: GOOD ( 33.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, 09 May 2021 14:07:45 +0100, Zenghui Yu wrote: > > On 2021/5/6 22:29, Marc Zyngier wrote: > > On Thu, 06 May 2021 12:43:26 +0100, > > Zenghui Yu wrote: > >> > >> On 2021/5/6 14:33, Marc Zyngier wrote: > >>> On Wed, 05 May 2021 17:46:51 +0100, > >>> Marc Zyngier wrote: > >>>> > >>>> Hi Zenghui, > >>>> > >>>> On Wed, 05 May 2021 15:23:02 +0100, > >>>> Zenghui Yu wrote: > >>>>> > >>>>> Hi Marc, > >>>>> > >>>>> On 2020/11/3 0:40, Marc Zyngier wrote: > >>>>>> In an effort to remove the vcpu PC manipulations from EL1 on nVHE > >>>>>> systems, move kvm_skip_instr() to be HYP-specific. EL1's intent > >>>>>> to increment PC post emulation is now signalled via a flag in the > >>>>>> vcpu structure. > >>>>>> > >>>>>> Signed-off-by: Marc Zyngier > >>>>> > >>>>> [...] > >>>>> > >>>>>> @@ -133,6 +134,8 @@ static int __kvm_vcpu_run_vhe(struct kvm_vcpu *vcpu) > >>>>>> __load_guest_stage2(vcpu->arch.hw_mmu); > >>>>>> __activate_traps(vcpu); > >>>>>> + __adjust_pc(vcpu); > >>>>> > >>>>> If the INCREMENT_PC flag was set (e.g., for WFx emulation) while we're > >>>>> handling PSCI CPU_ON call targetting this VCPU, the *target_pc* (aka > >>>>> entry point address, normally provided by the primary VCPU) will be > >>>>> unexpectedly incremented here. That's pretty bad, I think. > >>>> > >>>> How can you online a CPU using PSCI if that CPU is currently spinning > >>>> on a WFI? Or is that we have transitioned via userspace to perform the > >>>> vcpu reset? I can imagine it happening in that case. > >> > >> I hadn't tried to reset VCPU from userspace. That would be a much easier > >> way to reproduce this problem. > > > > Then I don't understand how you end-up there. If the vcpu was in WFI, > > it wasn't off and PSCI_CPU_ON doesn't have any effect. > > I'm sorry for the misleading words. > > The reported problem (secondary vcpu entry point corruption) was noticed > after a guest reboot. On rebooting, all vcpus will go back to userspace, > either because of a vcpu PSCI_SYSTEM_RESET call (with a > KVM_SYSTEM_EVENT_RESET system event in result), or because of a pending > signal targetting the vcpu thread. Userspace (I used QEMU) will then > perform the vcpu reset using the KVM_ARM_VCPU_INIT ioctl, of course! OK, that's exactly the scenario I had in mind, and we are in violent agreement! :-) > WFI is the last instruction executed by the secondary vcpu before > rebooting. Emulating it results in a PC-altering flag. > > What I was going to say is that maybe we can reproduce this problem with > a much simpler userspace program (not QEMU, no reboot) -- perform vcpu > reset while the vcpu is concurrently executing WFI, and see if the > result PC is set to 0 (per the KVM_ARM_VCPU_INIT doc). Maybe we can > achieve it with a kvm selftest case but "I hadn't tried", which turned > out to be misleading. No worries. At least I know we have the same understanding of the problem and we can look at the solution. > I'll have a look at your branch. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel