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From: Marc Zyngier <maz@kernel.org>
To: Will Deacon <will@kernel.org>
Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org,
	James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	qperret@google.com, kernel-team@android.com
Subject: Re: [PATCH 3/4] KVM: arm64: Rename SCTLR_ELx_FLAGS to SCTLR_EL2_FLAGS
Date: Wed, 10 Mar 2021 17:49:17 +0000	[thread overview]
Message-ID: <87zgzagaqq.wl-maz@kernel.org> (raw)
In-Reply-To: <20210310161546.GC29834@willie-the-truck>

On Wed, 10 Mar 2021 16:15:47 +0000,
Will Deacon <will@kernel.org> wrote:
> 
> On Wed, Mar 10, 2021 at 04:05:17PM +0000, Marc Zyngier wrote:
> > On Wed, 10 Mar 2021 15:46:26 +0000,
> > Will Deacon <will@kernel.org> wrote:
> > > 
> > > On Wed, Mar 10, 2021 at 03:26:55PM +0000, Marc Zyngier wrote:
> > > > Only the nVHE EL2 code is using this define, so let's make it
> > > > plain that it is EL2 only.
> > > > 
> > > > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > > > ---
> > > >  arch/arm64/include/asm/sysreg.h    | 2 +-
> > > >  arch/arm64/kvm/hyp/nvhe/hyp-init.S | 2 +-
> > > >  2 files changed, 2 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> > > > index dfd4edbfe360..9d1aef631646 100644
> > > > --- a/arch/arm64/include/asm/sysreg.h
> > > > +++ b/arch/arm64/include/asm/sysreg.h
> > > > @@ -579,7 +579,7 @@
> > > >  #define SCTLR_ELx_A	(BIT(1))
> > > >  #define SCTLR_ELx_M	(BIT(0))
> > > >  
> > > > -#define SCTLR_ELx_FLAGS	(SCTLR_ELx_M  | SCTLR_ELx_A | SCTLR_ELx_C | \
> > > > +#define SCTLR_EL2_FLAGS	(SCTLR_ELx_M  | SCTLR_ELx_A | SCTLR_ELx_C | \
> > > >  			 SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_IESB)
> > > >  
> > > >  /* SCTLR_EL2 specific flags. */
> > > > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> > > > index 4eb584ae13d9..7423f4d961a4 100644
> > > > --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> > > > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
> > > > @@ -122,7 +122,7 @@ alternative_else_nop_endif
> > > >  	 * as well as the EE bit on BE. Drop the A flag since the compiler
> > > >  	 * is allowed to generate unaligned accesses.
> > > >  	 */
> > > > -	mov_q	x0, (SCTLR_EL2_RES1 | (SCTLR_ELx_FLAGS & ~SCTLR_ELx_A))
> > > > +	mov_q	x0, (SCTLR_EL2_RES1 | (SCTLR_EL2_FLAGS & ~SCTLR_ELx_A))
> > > 
> > > Can we just drop SCTLR_ELx_A from SCTLR_EL2_FLAGS instead of clearing it
> > > here?
> > 
> > Absolutely. That'd actually be an improvement.
> 
> In fact, maybe just define INIT_SCTLR_EL2_MMU_ON to mirror what we do for
> EL1 (i.e. including the RES1 bits) and then use that here?

Like this?

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index dfd4edbfe360..593b9bf91bbd 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -579,9 +579,6 @@
 #define SCTLR_ELx_A	(BIT(1))
 #define SCTLR_ELx_M	(BIT(0))
 
-#define SCTLR_ELx_FLAGS	(SCTLR_ELx_M  | SCTLR_ELx_A | SCTLR_ELx_C | \
-			 SCTLR_ELx_SA | SCTLR_ELx_I | SCTLR_ELx_IESB)
-
 /* SCTLR_EL2 specific flags. */
 #define SCTLR_EL2_RES1	((BIT(4))  | (BIT(5))  | (BIT(11)) | (BIT(16)) | \
 			 (BIT(18)) | (BIT(22)) | (BIT(23)) | (BIT(28)) | \
@@ -593,6 +590,10 @@
 #define ENDIAN_SET_EL2		0
 #endif
 
+#define INIT_SCTLR_EL2_MMU_ON						\
+	(SCTLR_ELx_M  | SCTLR_ELx_C | SCTLR_ELx_SA | SCTLR_ELx_I |	\
+	 SCTLR_ELx_IESB | ENDIAN_SET_EL2 | SCTLR_EL2_RES1)
+
 #define INIT_SCTLR_EL2_MMU_OFF \
 	(SCTLR_EL2_RES1 | ENDIAN_SET_EL2)
 
diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
index 4eb584ae13d9..2e16b2098bbd 100644
--- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
@@ -117,13 +117,7 @@ alternative_else_nop_endif
 	tlbi	alle2
 	dsb	sy
 
-	/*
-	 * Preserve all the RES1 bits while setting the default flags,
-	 * as well as the EE bit on BE. Drop the A flag since the compiler
-	 * is allowed to generate unaligned accesses.
-	 */
-	mov_q	x0, (SCTLR_EL2_RES1 | (SCTLR_ELx_FLAGS & ~SCTLR_ELx_A))
-CPU_BE(	orr	x0, x0, #SCTLR_ELx_EE)
+	mov_q	x0, INIT_SCTLR_EL2_MMU_ON
 alternative_if ARM64_HAS_ADDRESS_AUTH
 	mov_q	x1, (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | \
 		     SCTLR_ELx_ENDA | SCTLR_ELx_ENDB)

	M.

-- 
Without deviation from the norm, progress is not possible.

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  reply	other threads:[~2021-03-10 17:51 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-10 15:26 [PATCH 0/4] KVM: arm64: Running the EL2 nVHE code with WXN Marc Zyngier
2021-03-10 15:26 ` [PATCH 1/4] arm64: Use INIT_SCTLR_EL1_MMU_OFF to disable the MMU on CPU restart Marc Zyngier
2021-03-10 15:26 ` [PATCH 2/4] KVM: arm64: Use INIT_SCTLR_EL2_MMU_OFF to disable the MMU on KVM teardown Marc Zyngier
2021-03-10 15:26 ` [PATCH 3/4] KVM: arm64: Rename SCTLR_ELx_FLAGS to SCTLR_EL2_FLAGS Marc Zyngier
2021-03-10 15:46   ` Will Deacon
2021-03-10 16:05     ` Marc Zyngier
2021-03-10 16:15       ` Will Deacon
2021-03-10 17:49         ` Marc Zyngier [this message]
2021-03-10 18:20           ` Will Deacon
2021-03-11 11:35             ` Mark Rutland
2021-03-11 12:00               ` Mark Rutland
2021-03-10 15:26 ` [PATCH 4/4] KVM: arm64: Force SCTLR_EL2.WXN when running nVHE Marc Zyngier

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