From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1B3F9C77B6E for ; Fri, 14 Apr 2023 11:38:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ajsq1Yzd+md4HePQH/9FfQyNgOEKsCeI374awRNpCXM=; b=cBCK91GqKgPHMZ /jgV0uGIimRDgSDV4BDWLo2h4e1rFi+A6HkEL2kkW1U6n0I2deQHZFlhItzDACvFVtCGrxzUYQpMu W33t5bRkUM595xWPIGt/qBWrRzoC9K7Z60HQwA9ZNoHfW/1RbmbUIfUJDnSFIEVd4gXSO3UhtHrd7 +UQiJhCvkrCOCAcR0PTAdC7dMSCnr/PwucTmrzDt9Vb6mGbLAxI61issLY0/ldH+cn5fJImM8bWtr +gQ9Bb/kqpC3mB1YfXoerEAeK/ZmI+claMOhQAeTBkNkIRsOAciiaYWCRO8r8iMVTXuIykNWjxj7L GR6gk5lFXx72VgQtfGWw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pnHjn-009P2m-2k; Fri, 14 Apr 2023 11:37:07 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pnHjk-009P12-0r for linux-arm-kernel@lists.infradead.org; Fri, 14 Apr 2023 11:37:06 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 865882F4; Fri, 14 Apr 2023 04:37:44 -0700 (PDT) Received: from [10.57.82.44] (unknown [10.57.82.44]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A431A3F587; Fri, 14 Apr 2023 04:36:58 -0700 (PDT) Message-ID: <8890bcc1-b881-e418-40a5-1b5d6cc8757e@arm.com> Date: Fri, 14 Apr 2023 12:36:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH] arm64: errata: Add NXP iMX8QM workaround for A53 Cache coherency issue To: Mark Rutland , "Ivan T. Ivanov" Cc: Catalin Marinas , Will Deacon , Mark Brown , Shawn Guo , Dong Aisheng , linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com References: <20230412125506.21634-1-iivanov@suse.de> Content-Language: en-GB From: Robin Murphy In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_043704_380217_664465F0 X-CRM114-Status: GOOD ( 11.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2023-04-13 12:19, Mark Rutland wrote: [...] >> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h >> index 6bf013fb110d..1ed648f7f29a 100644 >> --- a/arch/arm64/include/asm/cpufeature.h >> +++ b/arch/arm64/include/asm/cpufeature.h >> @@ -835,7 +835,8 @@ static inline bool system_supports_bti(void) >> static inline bool system_supports_tlb_range(void) >> { >> return IS_ENABLED(CONFIG_ARM64_TLB_RANGE) && >> - cpus_have_const_cap(ARM64_HAS_TLB_RANGE); >> + cpus_have_const_cap(ARM64_HAS_TLB_RANGE) && >> + !cpus_have_const_cap(ARM64_WORKAROUND_NXP_ERR050104); >> } > > It'd be better to handle this in the detection of ARM64_HAS_TLB_RANGE, as we > have for CNP where has_useable_cnp() checks for ARM64_WORKAROUND_NVIDIA_CARMEL_CNP. It's not needed in either place, since neither Cortex-A53 or Cortex-A72 support FEAT_TLBIRANGE, so this could never be true on affected platforms anyway. Tangentially, I understand this platform has an SMMU[1], so I'd say it would also be worth checking what SMMU_IDR0.BTM reports. With any luck it might be 0, but if it's 1 then strictly it would want to be overridden as part of a complete workaround as well. That wouldn't be a practical issue right now, not least since the current Linux driver doesn't even use BTM, but it's something which could need to be borne in mind in future. Robin. [1] https://lore.kernel.org/linux-arm-kernel/20210807104517.24066-1-peng.fan@oss.nxp.com/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel