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Sun, 30 Aug 2026 16:18:41 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , Subject: [PATCH v10 12/13] iommu/arm-smmu-v3: Skip RMR bypass for kdump adoption Date: Sun, 30 Aug 2026 16:18:13 -0700 Message-ID: <89285912833ba2aea8e43d10d66f0e7e01e1c256.1788130528.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C37D:EE_|DS0PR12MB7725:EE_ X-MS-Office365-Filtering-Correlation-Id: 742db65c-0e2e-42a7-ced0-08df06ed0d57 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700016|30052699003|23010399003|7416014|376014|6133799003|22082099003|18002099003|56012099006|11063799006|10067099003; X-Microsoft-Antispam-Message-Info: zLin/SSLIh9iDCw/act5piNDAuK0uIcvgibCEsqf+AKko+wWyR0BhF9uwBD7xjSe3jvomTJTWJ3+I1zxnFCytnwoxfT0TE2ejAS4a4p7I6u4VnO0im86acz1i/HHf+ILKqZS1aFcEDFwYWxL5aLZO8ckgD0nT+ZSIcDYi7WO5xwRSz4VSQljJg/2jvdCJCdX+0m115Pspca9pGrapojZ/WgyPfE7KSmYXu/+HzOXh+Qp/vYAZBa5sxTFkmIMqOXSxldQ82dgyvIsgXhgQXwIdog0h7GG/smEmvEeF85FnJVUJQ3wJn5CIpZfBzwSVBRb4GjEXHZqMwghsMIwoD7/yGvBEwqL4xWSpl43/6WF/Zai08dFGl/yPJ2iQDbIETXKFD4O6F0HF5xLsWc88rmiiWCRNfO4YdGnlhltBoYDMT9lh1A72yY/GeMR5R+tNTmEFNkc7wjK5A1uoG3cUL29yaYodHLV7tMfdxU0vkwh76wsvad3fVxmzS1QMgtM0A5ddzhW19clYg5U42JL1pkJg20XZDDqmT+oAKINTJQYmP1cTr2gVPnUe37mrIg9h6fcC4tEYQplFp+o8EU/MScE1m8Qq6npnZnZSG6bKNEVtsY2Mu6Qcvp0MZ6ipBWXAIDQ9J5stKU66c7PMnAYpRwH2eeC3jm9iPOQ9oP8ZPptyrpPFxnQFetnyMxBFck3WOtbSEDg/rIRXKCZstt25YRaCg== X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700016)(30052699003)(23010399003)(7416014)(376014)(6133799003)(22082099003)(18002099003)(56012099006)(11063799006)(10067099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0i1Bo7Ft0UufmFS9rGaln2QHxYNn4QbAJRASnNta+hSDpi8knCIHmGQh0OW0506MKJCMV/cWSNFORJNe5SkpirO2FJnbzDjgk2bX8+MvT3V2UmdCLYlVCNi8kdAkJOEqtz6zqQ3oaBuffcGHIklKfcD9ziA20pMX+FAp9PIK1iQWCZ9nn9dsvRYxNnUfhonzHQ3nhLgipgGXD/8j48IXIdaYWA92LrKOiClgJvM1fTFLrqmw865NtUP39XYTrA7H2CKB+mD+MuCinbUz6cYOHlxL1IDa6xoOBlskFx/Mm2/9FrQ7tFkQLLc2Di6sQiitDUswDhzdKzA3f2wMFcz1p5O6c+uJ3sMqdsa17+9GYbjPdeBm9NSybhm2R8cUJZTW0DdnPvRHhCgQH2xBigTxPqqwxv1lrQyRzrK+S+Ev1PHaRj0UcnI82P3TPeQyIOEh X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Aug 2026 23:18:50.9390 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 742db65c-0e2e-42a7-ced0-08df06ed0d57 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7725 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260830_161858_752995_0E285C29 X-CRM114-Status: GOOD ( 14.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RMR bypass STEs are installed during SMMUv3 probe for StreamIDs listed by IORT RMR nodes. A normal boot switches the driver to a fresh stream table whose initial STEs abort, so those RMR SIDs need bypass entries before it becomes live. This preserves firmware/guest-owned traffic, including vSMMU guest MSI cases built around RMR-described SIDs. ARM_SMMU_OPT_KDUMP_ADOPT is the opposite case: the driver keeps SMMUEN set and adopts the crashed kernel's stream table, so RMR SIDs already have the only translation state known to be safe for active in-flight DMA. Replacing an adopted STE with bypass can turn translated DMA into physical DMA, then point it at the wrong memory. arm_smmu_make_bypass_ste() also rewrites the STE in place after clearing it first. While the table is live, a concurrent hardware STE fetch can observe V=0 or mixed old/new state. Leaving the adopted STE unmodified keeps the kdump kernel using the crashed kernel's translation. That gives the endpoint driver a chance to probe and quiesce the device. If the old STE was already abort or invalid, installing bypass would create new DMA permission; leaving it alone is a safer failure mode. Later domain setup still gets the RMR direct mappings through the reserved-region path. Reviewed-by: Pranjal Shrivastava Reviewed-by: Jason Gunthorpe Assisted-by: Codex:gpt-5.5 Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 0fb8c60526699..525cdc2e7d495 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5536,6 +5536,14 @@ static void arm_smmu_rmr_install_bypass_ste(struct arm_smmu_device *smmu) struct list_head rmr_list; struct iommu_resv_region *e; + /* + * Kdump adoption keeps the crashed kernel's table live. Rewriting the + * adopted STE here could expose an in-flight fetch to a transient V=0 + * entry, or change Cfg=translate to Cfg=bypass. Must skip here. + */ + if (smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT) + return; + INIT_LIST_HEAD(&rmr_list); iort_get_rmr_sids(dev_fwnode(smmu->dev), &rmr_list); @@ -5552,10 +5560,7 @@ static void arm_smmu_rmr_install_bypass_ste(struct arm_smmu_device *smmu) continue; } - /* - * STE table is not programmed to HW, see - * arm_smmu_initial_bypass_stes() - */ + /* The fresh stream table is not yet live. */ arm_smmu_make_bypass_ste(smmu, arm_smmu_get_step_for_sid(smmu, rmr->sids[i])); } -- 2.43.0