From: Robin Murphy <robin.murphy@arm.com>
To: Vasily Khoruzhick <anarsoul@gmail.com>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Cc: "Jared D . McNeill" <jmcneill@NetBSD.org>,
Harald Geyer <harald@ccbib.org>
Subject: Re: [PATCH] arm64: dts: allwinner: a64: Drop PMU node
Date: Tue, 6 Aug 2019 15:35:30 +0100 [thread overview]
Message-ID: <89402d22-d432-9551-e787-c8ede16dbe5f@arm.com> (raw)
In-Reply-To: <20190806140135.4739-1-anarsoul@gmail.com>
On 06/08/2019 15:01, Vasily Khoruzhick wrote:
> Looks like PMU in A64 is broken, it generates no interrupts at all and
> as result 'perf top' shows no events.
Does something like 'perf stat sleep 1' at least count cycles correctly?
It could well just be that the interrupt numbers are wrong...
> Tested on Pine64-LTS.
>
> Fixes: 34a97fcc71c2 ("arm64: dts: allwinner: a64: Add PMU node")
> Cc: Harald Geyer <harald@ccbib.org>
> Cc: Jared D. McNeill <jmcneill@NetBSD.org>
> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 ---------
> 1 file changed, 9 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 9cc9bdde81ac..cd92f546c483 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -142,15 +142,6 @@
> clock-output-names = "ext-osc32k";
> };
>
> - pmu {
> - compatible = "arm,cortex-a53-pmu";
> - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
Cross-referencing between some random DTs in the H6 BSP I happen to have
to hand and the A64 User Manual, it looks a lot like someone just forgot
to subtract 32 from these to satisfy the awkward GIC binding - that
wants the SPI index rather than the actual interrupt source number,
which implies these should probably be 120-123 rather than 152-155.
Robin.
> - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
> - };
> -
> psci {
> compatible = "arm,psci-0.2";
> method = "smc";
>
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next prev parent reply other threads:[~2019-08-06 14:35 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-06 14:01 [PATCH] arm64: dts: allwinner: a64: Drop PMU node Vasily Khoruzhick
2019-08-06 14:35 ` Robin Murphy [this message]
2019-08-06 14:45 ` Vasily Khoruzhick
2019-08-06 20:19 ` Harald Geyer
2019-08-06 20:52 ` Vasily Khoruzhick
2019-08-06 21:14 ` Robin Murphy
2019-08-07 2:39 ` Vasily Khoruzhick
2019-08-07 11:56 ` Maxime Ripard
2019-08-07 17:36 ` Vasily Khoruzhick
2019-08-08 16:26 ` Maxime Ripard
2019-08-08 19:59 ` Vasily Khoruzhick
2019-08-12 8:04 ` Maxime Ripard
2019-08-12 18:01 ` Vasily Khoruzhick
2019-08-12 18:22 ` Harald Geyer
2019-08-13 5:39 ` Maxime Ripard
2019-09-23 23:51 ` Vasily Khoruzhick
2019-09-23 23:55 ` Vasily Khoruzhick
2019-09-25 11:08 ` Maxime Ripard
2019-10-31 19:10 ` Clément Péron
2019-10-31 20:35 ` Vasily Khoruzhick
2019-11-01 11:30 ` Clément Péron
2019-11-01 15:47 ` Andre Przywara
2019-11-11 1:43 ` André Przywara
2019-08-07 11:59 ` Robin Murphy
2019-08-07 11:12 ` Mark Rutland
2019-08-06 19:10 ` Emmanuel Vadot
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