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Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vWa1n-0000000AJja-2jxM; Fri, 19 Dec 2025 12:56:15 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vWa1m-0000000AJjU-0mk2 for linux-arm-kernel@lists.infradead.org; Fri, 19 Dec 2025 12:56:14 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 447596001D; Fri, 19 Dec 2025 12:56:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 76105C4CEF1; Fri, 19 Dec 2025 12:56:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766148973; bh=tKHyoPcqHO2MUgvZQBKiovkJt+tJh80vJvzQGB3Yrus=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=C0lnkwallTZKjBt4GyRjCCGQIULpAEbKpA+7OJS0yV2TNPbGZET7zOjlHPnooSlRO yjVVC5YmTBY3ogjOM0P9lEZQAMSN5DvM3RbFPrCe9awkoglOtpaA1kLZugI9B2pIKB JERdw8PpESN0EJAW115hmNumMRBdsDO6wcyQSz1vUzXgV+6PeM9B6KtqCaOs2vvFm9 TSO21y4u/bfycn+Q7M65Jrv7CIYhGnEL2Tuzz3Q3mFGllmIztoKPGfYUODhos+WnfN TM+8kALjvS2AB6CbJYZ2Lm6qlRY1vNcWXe5vRdlAB+S5k8sTzMIODWP8N5au8wDs1p 8ps6P0cOKe1Vw== Message-ID: <8b02a404-8c5a-4c0d-a80c-63fa401514b2@kernel.org> Date: Fri, 19 Dec 2025 13:56:02 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/11] dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller To: Taniya Das , Konrad Dybcio Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Maxime Coquelin , Alexandre Torgue , Vladimir Zapolskiy , Konrad Dybcio , Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Jingyi Wang , Bryan O'Donoghue References: <20251125-kaanapali-mmcc-v2-v2-0-fb44e78f300b@oss.qualcomm.com> <20251125-kaanapali-mmcc-v2-v2-7-fb44e78f300b@oss.qualcomm.com> <20251126-elated-stoic-scorpion-25b630@kuoka> <503f445e-0d12-407d-bc77-f48ad335639b@oss.qualcomm.com> <3e8128f4-3cba-4c13-a846-e5f1638a1e0f@kernel.org> <57ab2d5d-5aaa-4f9c-83ae-0f7ebc1e648b@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 19/12/2025 11:39, Taniya Das wrote: > > > On 12/17/2025 7:24 PM, Krzysztof Kozlowski wrote: >> On 17/12/2025 14:21, Konrad Dybcio wrote: >>> On 12/17/25 11:09 AM, Krzysztof Kozlowski wrote: >>>> On 17/12/2025 10:32, Taniya Das wrote: >>>>>>> >>>>>>> We would like to leverage the existing common clock driver(GDSC) code to >>>>>> >>>>>> Fix the driver code if it cannot handle other cells. Your drivers do not >>>>>> matter for choices made in bindings. >>>>>> >>>>> >>>>> As it is still a clock controller from hardware design and in SW I will >>>>> be map the entire hardware region and this way this clock controller >>>>> will also be aligned to the existing clock controllers and keep the >>>>> #power-domain-cells = <1> as other CCs. >>>> >>>> I don't see how this resolves my comment. >>> >>> Spanning the entire 0x6000-long block will remove your worry about this >>> description only being 2-register-wide >> >> But that was not the comment here. Taniya replied under comment about >> cells. We are not discussing here some other things... >> > > I will review and add support for handling #power-domain-cells = <0> in > our common code of clock & gdsc. However, the initial intent was to keep > the GDSC phandle uniform across chipsets as this is a clock controller > by hardware design, which is why #power-domain-cells was originally set > to <1>. Having cells=0 or =2 or =3 does not change "as this is a clock controller by hardware design" at all. I do not see any of these arguments relevant to discussion. Best regards, Krzysztof