From: "André Przywara" <andre.przywara@arm.com>
To: Mark Rutland <mark.rutland@arm.com>, Mark Brown <broonie@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
linux-kernel@vger.kernel.org,
Catalin Marinas <catalin.marinas@arm.com>,
Linus Walleij <linus.walleij@linaro.org>,
Russell King <linux@armlinux.org.uk>,
Ard Biesheuvel <ardb@kernel.org>,
Sudeep Holla <sudeep.holla@arm.com>,
Will Deacon <will@kernel.org>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 4/5] arm64: Add support for SMCCC TRNG entropy source
Date: Thu, 5 Nov 2020 14:30:27 +0000 [thread overview]
Message-ID: <8bc7c4f9-651d-0ebe-858e-daa6307ec508@arm.com> (raw)
In-Reply-To: <20201105140322.GH82102@C02TD0UTHF1T.local>
On 05/11/2020 14:03, Mark Rutland wrote:
> On Thu, Nov 05, 2020 at 01:41:42PM +0000, Mark Brown wrote:
>> On Thu, Nov 05, 2020 at 12:56:55PM +0000, Andre Przywara wrote:
>>
>>> static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
>>> {
>>> + struct arm_smccc_res res;
>>> unsigned long val;
>>> - bool ok = arch_get_random_seed_long(&val);
>>>
>>> - *v = val;
>>> - return ok;
>>> + if (cpus_have_const_cap(ARM64_HAS_RNG)) {
>>> + if (arch_get_random_seed_long(&val)) {
>>> + *v = val;
>>> + return true;
>>> + }
>>> + return false;
>>> + }
>>
>> It isn't obvious to me why we don't fall through to trying the SMCCC
>> TRNG here if for some reason the v8.5-RNG didn't give us something.
>> Definitely an obscure possibility but still...
>
> I think it's better to assume that if we have a HW RNG and it's not
> giving us entropy, it's not worthwhile trapping to the host, which might
> encounter the exact same issue.
>
> I'd rather we have one RNG source that we trust works, and use that
> exclusively.
>
> That said, I'm not sure it's great to plumb this under the
> arch_get_random*() interfaces, e.g. given this measn that
> add_interrupt_randomness() will end up trapping to the host all the time
> when it calls arch_get_random_seed_long().
>
> Is there an existing interface for "slow" runtime entropy that we can
> plumb this into instead?
There is the framework implementing /dev/hwrng, and in fact I started
with a driver for that (have that in some working state).
But this is only available somewhat late in the game (after drivers get
initialised), and Ard mentioned that one advantage of the firmware i/f
is (somewhat) early availability. Now for SMCCC we need firmware tables
(for the conduit), so it's not too early either.
If too frequent firmware traps are a concern, we could always request
the maximum 192 bits, and store them. That would avoid 2/3 of the
current traps.
Cheers,
Andre
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next prev parent reply other threads:[~2020-11-05 14:32 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-05 12:56 [PATCH v2 0/5] ARM: arm64: Add SMCCC TRNG entropy service Andre Przywara
2020-11-05 12:56 ` [PATCH v2 1/5] firmware: smccc: Add SMCCC TRNG function call IDs Andre Przywara
2020-11-05 12:56 ` [PATCH v2 2/5] firmware: smccc: Introduce SMCCC TRNG framework Andre Przywara
2020-11-05 12:56 ` [PATCH v2 3/5] ARM: implement support for SMCCC TRNG entropy source Andre Przywara
2020-11-05 17:15 ` kernel test robot
2020-11-05 17:56 ` André Przywara
2020-11-05 17:15 ` kernel test robot
2020-11-06 15:29 ` Marc Zyngier
2020-11-06 15:30 ` Ard Biesheuvel
2020-11-06 15:35 ` Marc Zyngier
2020-11-05 12:56 ` [PATCH v2 4/5] arm64: Add " Andre Przywara
2020-11-05 13:41 ` Mark Brown
2020-11-05 14:03 ` Mark Rutland
2020-11-05 14:04 ` Ard Biesheuvel
2020-11-05 14:30 ` Mark Rutland
2020-11-05 14:34 ` Ard Biesheuvel
2020-11-05 14:45 ` Mark Rutland
2020-11-05 14:48 ` Marc Zyngier
2020-11-05 14:29 ` Mark Brown
2020-11-05 14:38 ` Mark Rutland
2020-11-12 16:03 ` André Przywara
2020-11-05 14:30 ` André Przywara [this message]
2020-11-05 12:56 ` [PATCH v2 5/5] KVM: arm64: implement the TRNG hypervisor call Andre Przywara
2020-11-05 14:13 ` Marc Zyngier
2020-11-05 16:19 ` Ard Biesheuvel
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