From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D0A7AC001B0 for ; Tue, 8 Aug 2023 08:48:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=E7M4tuJH51L8aoSlymMDwdAK4kR9ZjWqImWeke/+RVw=; b=jMRxicXd0vOC1M k+AZ1E6Aa/KBmd8PBglkkVVgP2APnYCOP7AIaOoHPC/0fJWhWPh5HB2bX4hzM9EFKni4/sH2T7CDT bAxFjoumm68UI0r5zUBrP7LiDQu5iNon/9f+hkpJ7rD0NyrUKVmLlZq3Jz9vInne+AYRqAgOGdpHb mpElAg+Ge5DuPDENb6Eb9RpJwLvv7kW/kB3p+Fx7n2RduiitriZBPyKKjtM474OWr5r5F+qfhyj/c TXVqMZPVpJztWv9+VI4vvQMvVn+A2g0nNLpkrzwy0kPB6GSvftLLqsmrSFXpRUg13svMfVLfzb1Ep GAN5Ow7eVXS6YyNleMkw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qTIOD-0024wh-09; Tue, 08 Aug 2023 08:48:29 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qTIO9-0024vW-2P for linux-arm-kernel@lists.infradead.org; Tue, 08 Aug 2023 08:48:27 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A22671515; Tue, 8 Aug 2023 01:49:02 -0700 (PDT) Received: from [10.57.90.239] (unknown [10.57.90.239]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 32A3B3F59C; Tue, 8 Aug 2023 01:48:18 -0700 (PDT) Message-ID: <8bef9c5a-eede-f78f-4418-da10c99a5bef@arm.com> Date: Tue, 8 Aug 2023 09:48:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH V4 1/4] arm_pmu: acpi: Refactor arm_spe_acpi_register_device() To: Anshuman Khandual , linux-arm-kernel@lists.infradead.org Cc: yangyicong@huawei.com, Sami Mujawar , Catalin Marinas , Will Deacon , Mark Rutland , Mike Leach , Leo Yan , Alexander Shishkin , James Clark , coresight@lists.linaro.org, linux-kernel@vger.kernel.org References: <20230808082247.383405-1-anshuman.khandual@arm.com> <20230808082247.383405-2-anshuman.khandual@arm.com> From: Suzuki K Poulose In-Reply-To: <20230808082247.383405-2-anshuman.khandual@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230808_014825_878118_76C08D7A X-CRM114-Status: GOOD ( 27.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 08/08/2023 09:22, Anshuman Khandual wrote: > Sanity checking all the GICC tables for same interrupt number, and ensuring > a homogeneous ACPI based machine, could be used for other platform devices > as well. Hence this refactors arm_spe_acpi_register_device() into a common > helper arm_acpi_register_pmu_device(). > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Mark Rutland > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Co-developed-by: Will Deacon > Signed-off-by: Will Deacon > Signed-off-by: Anshuman Khandual > --- > drivers/perf/arm_pmu_acpi.c | 105 ++++++++++++++++++++++-------------- > 1 file changed, 65 insertions(+), 40 deletions(-) > > diff --git a/drivers/perf/arm_pmu_acpi.c b/drivers/perf/arm_pmu_acpi.c > index 90815ad762eb..72454bef2a70 100644 > --- a/drivers/perf/arm_pmu_acpi.c > +++ b/drivers/perf/arm_pmu_acpi.c > @@ -69,6 +69,63 @@ static void arm_pmu_acpi_unregister_irq(int cpu) > acpi_unregister_gsi(gsi); > } > > +static int __maybe_unused > +arm_acpi_register_pmu_device(struct platform_device *pdev, u8 len, > + u16 (*parse_gsi)(struct acpi_madt_generic_interrupt *)) > +{ > + int cpu, this_hetid, hetid, irq, ret; > + u16 this_gsi, gsi = 0; > + > + /* > + * Ensure that platform device must have IORESOURCE_IRQ > + * resource to hold gsi interrupt. > + */ > + if (pdev->num_resources != 1) > + return -ENXIO; > + > + if (pdev->resource[0].flags != IORESOURCE_IRQ) > + return -ENXIO; > + > + /* > + * Sanity check all the GICC tables for the same interrupt > + * number. For now, only support homogeneous ACPI machines. > + */ > + for_each_possible_cpu(cpu) { > + struct acpi_madt_generic_interrupt *gicc; > + > + gicc = acpi_cpu_get_madt_gicc(cpu); > + if (gicc->header.length < len) > + return gsi ? -ENXIO : 0; > + > + this_gsi = parse_gsi(gicc); > + if (!this_gsi) > + return gsi ? -ENXIO : 0; > + > + this_hetid = find_acpi_cpu_topology_hetero_id(cpu); > + if (!gsi) { > + hetid = this_hetid; > + gsi = this_gsi; > + } else if (hetid != this_hetid || gsi != this_gsi) { > + pr_warn("ACPI: %s: must be homogeneous\n", pdev->name); > + return -ENXIO; > + } > + } > + > + irq = acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH); > + if (irq < 0) { > + pr_warn("ACPI: %s Unable to register interrupt: %d\n", pdev->name, gsi); > + return -ENXIO; > + } > + > + pdev->resource[0].start = irq; > + ret = platform_device_register(pdev); > + if (ret < 0) { > + pr_warn("ACPI: %s: Unable to register device\n", pdev->name); > + acpi_unregister_gsi(gsi); > + } > + return ret; A postivie return value here could confuse the caller. Also, with my comment below, we don't really need to return something from here. > +} > + > #if IS_ENABLED(CONFIG_ARM_SPE_PMU) > static struct resource spe_resources[] = { > { > @@ -84,6 +141,11 @@ static struct platform_device spe_dev = { > .num_resources = ARRAY_SIZE(spe_resources) > }; > > +static u16 arm_spe_parse_gsi(struct acpi_madt_generic_interrupt *gicc) > +{ > + return gicc->spe_interrupt; > +} > + > /* > * For lack of a better place, hook the normal PMU MADT walk > * and create a SPE device if we detect a recent MADT with > @@ -91,47 +153,10 @@ static struct platform_device spe_dev = { > */ > static void arm_spe_acpi_register_device(void) > { > - int cpu, hetid, irq, ret; > - bool first = true; > - u16 gsi = 0; > - > - /* > - * Sanity check all the GICC tables for the same interrupt number. > - * For now, we only support homogeneous ACPI/SPE machines. > - */ > - for_each_possible_cpu(cpu) { > - struct acpi_madt_generic_interrupt *gicc; > - > - gicc = acpi_cpu_get_madt_gicc(cpu); > - if (gicc->header.length < ACPI_MADT_GICC_SPE) > - return; > - > - if (first) { > - gsi = gicc->spe_interrupt; > - if (!gsi) > - return; > - hetid = find_acpi_cpu_topology_hetero_id(cpu); > - first = false; > - } else if ((gsi != gicc->spe_interrupt) || > - (hetid != find_acpi_cpu_topology_hetero_id(cpu))) { > - pr_warn("ACPI: SPE must be homogeneous\n"); > - return; > - } > - } > - > - irq = acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, > - ACPI_ACTIVE_HIGH); > - if (irq < 0) { > - pr_warn("ACPI: SPE Unable to register interrupt: %d\n", gsi); > - return; > - } > - > - spe_resources[0].start = irq; > - ret = platform_device_register(&spe_dev); > - if (ret < 0) { > + int ret = arm_acpi_register_pmu_device(&spe_dev, ACPI_MADT_GICC_SPE, > + arm_spe_parse_gsi); > + if (ret) > pr_warn("ACPI: SPE: Unable to register device\n"); With this change, a system without SPE interrupt description always generates the above message. Is this intended ? Could we not drop the above message as all the other possible error scenarios are reported. We could simply make the above helper void, see my comment above. Suzuki > - acpi_unregister_gsi(gsi); > - } > } > #else > static inline void arm_spe_acpi_register_device(void) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel