From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 421D6C2BD09 for ; Wed, 3 Jul 2024 07:09:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:MIME-Version:Date:Message-ID:From:References:CC:To: Subject:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=CWNkbWcXoxyNn/UtVSDDGY2VdNw9NgTw1ymoLQO/QjU=; b=HoAXlC8E6CNsmJlUzE+eG3mYeY gGdSk8dHBYIiqOHgKJvSPYJUB6Vqe0mftaksH7+zsHmsx7XhAqyAC3nLSljdQNYj3zoY9ovFuaoBM 8YR/h2hL5N2ifht7IR3ZXCfhhSxqwfY21iOFPmxBPq8fGFy7JBEWJSVLuYH0PHFu8bvF8aF6M/7Rn iwC3FGukYLDaXf65VvHhjqu88xzapBFydDW2Rxs46ZWO4Lm9d4S60M/fTD2H4CJgKAikZeNbSfnqC A9v7tclthtsb6kGTQ7RiVaCd1/zhAq1ns+STglg2MYhzW0G53bcEY6hetxynq62UIH9ibkIU6cg4K ajN0Ggzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sOu7N-00000009IHS-2pz4; Wed, 03 Jul 2024 07:09:29 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sOu7B-00000009IFU-2rcw for linux-arm-kernel@lists.infradead.org; Wed, 03 Jul 2024 07:09:19 +0000 Received: from mail.maildlp.com (unknown [172.19.162.112]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4WDW4X5hdXz1X4RM; Wed, 3 Jul 2024 15:05:00 +0800 (CST) Received: from kwepemm600007.china.huawei.com (unknown [7.193.23.208]) by mail.maildlp.com (Postfix) with ESMTPS id 3736114037E; Wed, 3 Jul 2024 15:09:07 +0800 (CST) Received: from [10.174.185.179] (10.174.185.179) by kwepemm600007.china.huawei.com (7.193.23.208) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 3 Jul 2024 15:09:05 +0800 Subject: Re: [kvm-unit-tests PATCH v1 1/2] arm/pmu: skip the PMU introspection test if missing To: =?UTF-8?Q?Alex_Benn=c3=a9e?= CC: , , , , , , , Anders Roxell , Andrew Jones , Alexandru Elisei , Eric Auger , "open list:ARM" References: <20240702163515.1964784-1-alex.bennee@linaro.org> <20240702163515.1964784-2-alex.bennee@linaro.org> From: Zenghui Yu Message-ID: <8c11996c-b36d-e560-cdeb-e543ee478a54@huawei.com> Date: Wed, 3 Jul 2024 15:09:05 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <20240702163515.1964784-2-alex.bennee@linaro.org> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [10.174.185.179] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To kwepemm600007.china.huawei.com (7.193.23.208) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240703_000917_922826_09C87B9F X-CRM114-Status: GOOD ( 14.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2024/7/3 0:35, Alex Bennée wrote: > The test for number of events is not a substitute for properly > checking the feature register. Fix the define and skip if PMUv3 is not > available on the system. This includes emulator such as QEMU which > don't implement PMU counters as a matter of policy. > > Signed-off-by: Alex Bennée > Cc: Anders Roxell > --- > arm/pmu.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/arm/pmu.c b/arm/pmu.c > index 9ff7a301..66163a40 100644 > --- a/arm/pmu.c > +++ b/arm/pmu.c > @@ -200,7 +200,7 @@ static void test_overflow_interrupt(bool overflow_at_64bits) {} > #define ID_AA64DFR0_PERFMON_MASK 0xf > > #define ID_DFR0_PMU_NOTIMPL 0b0000 > -#define ID_DFR0_PMU_V3 0b0001 > +#define ID_DFR0_PMU_V3 0b0011 Why? This is a macro used for AArch64 and DDI0487J.a (D19.2.59, the description of the PMUVer field) says that "0b0001 Performance Monitors Extension, PMUv3 implemented." while 0b0011 is a reserved value. Thanks, Zenghui