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From: Schrempf Frieder <frieder.schrempf@kontron.de>
To: Daniel Baluta <daniel.baluta@nxp.com>,
	Adam Ford <aford173@gmail.com>, Anson Huang <Anson.Huang@nxp.com>,
	Christian Gmeiner <christian.gmeiner@gmail.com>,
	Fabio Estevam <festevam@gmail.com>,
	"Leonard Crestez" <leonard.crestez@nxp.com>,
	Li Jun <jun.li@nxp.com>, Lucas Stach <l.stach@pengutronix.de>,
	NXP Linux Team <linux-imx@nxp.com>, Peng Fan <peng.fan@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	"Russell King" <linux+etnaviv@armlinux.org.uk>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	 Shawn Guo <shawnguo@kernel.org>,
	"S.j. Wang" <shengjiu.wang@nxp.com>
Cc: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"etnaviv@lists.freedesktop.org" <etnaviv@lists.freedesktop.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH 1/4] drm/etnaviv: Prevent IRQ triggering at probe time on i.MX8MM
Date: Thu, 30 Apr 2020 15:30:06 +0000	[thread overview]
Message-ID: <8c724ada-2989-d2ad-b820-b16dbdd97f9b@kontron.de> (raw)
In-Reply-To: <5c4c994b-8868-f68c-cd0d-7f7a2530f697@nxp.com>

On 30.04.20 16:23, Daniel Baluta wrote:
> On 4/30/20 3:46 PM, Schrempf Frieder wrote:
>> +    /*
>> +     * On i.MX8MM there is an interrupt getting triggered immediately
>> +     * after requesting the IRQ, which leads to a stall as the handler
>> +     * accesses the GPU registers whithout the clock being enabled.
>> +     * Enabling the clocks briefly seems to clear the IRQ state, so 
>> we do
>> +     * this here before requesting the IRQ.
>> +     */
>> +    err = etnaviv_gpu_clk_enable(gpu);
>> +    if (err)
>> +        return err;
>> +
>> +    err = etnaviv_gpu_clk_disable(gpu);
>> +    if (err)
>> +        return err;
>> +
>> +    err = devm_request_irq(&pdev->dev, gpu->irq, irq_handler, 0,
>> +                   dev_name(gpu->dev), gpu);
>> +    if (err) {
>> +        dev_err(dev, "failed to request IRQ%u: %d\n", gpu->irq, err);
>> +        return err;
>> +    }
> 
> Shouldn't you disable the clk after devm_request_irq is called?

That's what I first thought, too. But then I found out, that merely 
enabling the clocks will clear the sparse interrupt and cause the 
handler not to be called during probe anymore.
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  reply	other threads:[~2020-04-30 15:30 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-30 12:46 [RFC PATCH 0/4] Add support for i.MX8MM GPUs through Etnaviv Schrempf Frieder
2020-04-30 12:46 ` [RFC PATCH 1/4] drm/etnaviv: Prevent IRQ triggering at probe time on i.MX8MM Schrempf Frieder
2020-04-30 14:23   ` Daniel Baluta
2020-04-30 15:30     ` Schrempf Frieder [this message]
2020-04-30 14:32   ` Lucas Stach
2020-04-30 15:31     ` Schrempf Frieder
2020-04-30 16:14       ` Adam Ford
2020-04-30 12:46 ` [RFC PATCH 2/4] drm/etnaviv: Fix error path in etnaviv_gpu_clk_enable() Schrempf Frieder
2020-04-30 12:46 ` [RFC PATCH 3/4] drm/etnaviv: Change order of enabling clocks to fix boot on i.MX8MM Schrempf Frieder
2020-04-30 14:35   ` Lucas Stach
2020-04-30 15:35     ` Schrempf Frieder
2020-05-01 12:36       ` Peng Fan
2020-05-06 11:27         ` Schrempf Frieder
2020-04-30 12:46 ` [RFC PATCH 4/4] arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core using Etnaviv Schrempf Frieder
2020-05-03 14:49   ` Adam Ford
2020-05-04  8:07     ` Lucas Stach
2020-05-06 11:45     ` Schrempf Frieder
2020-05-06 11:59       ` Schrempf Frieder

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