From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Xianwei Zhao <xianwei.zhao@amlogic.com>,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Chuan Liu <chuan.liu@amlogic.com>
Subject: Re: [PATCH V6 2/4] dt-bindings: clock: add Amlogic C3 peripherals clock controller bindings
Date: Fri, 10 Nov 2023 14:24:39 +0100 [thread overview]
Message-ID: <8d9ec256-fbea-4711-966c-8c68d83eeb1f@linaro.org> (raw)
In-Reply-To: <20231106085554.3237511-3-xianwei.zhao@amlogic.com>
On 06/11/2023 09:55, Xianwei Zhao wrote:
> @@ -0,0 +1,237 @@
A nit, subject: drop second/last, redundant "bindings". The
"dt-bindings" prefix is already stating that these are bindings.
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Copyright (c) 2023 Amlogic, Inc. All rights reserved.
> + * Author: Chuan Liu <chuan.liu@amlogic.com>
> + */
> +
> +#ifndef _DT_BINDINGS_CLOCK_AMLOGIC_C3_PERIPHERALS_CLKC_H
> +#define _DT_BINDINGS_CLOCK_AMLOGIC_C3_PERIPHERALS_CLKC_H
> +
> +#define CLKID_PLL_SRC 0
> +#define CLKID_MCLK_PLL_SRC 1
> +#define CLKID_DDR_PLL_SRC 2
> +#define CLKID_DDR_PHY_SRC 3
Fix the indentation. In all other patchses as well.
Best regards,
Krzysztof
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next prev parent reply other threads:[~2023-11-10 13:25 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-06 8:55 [PATCH V6 0/4] Add C3 SoC PLLs and Peripheral clock Xianwei Zhao
2023-11-06 8:55 ` [PATCH V6 1/4] dt-bindings: clock: add Amlogic C3 PLL clock controller bindings Xianwei Zhao
2023-11-10 13:23 ` Krzysztof Kozlowski
2023-11-06 8:55 ` [PATCH V6 2/4] dt-bindings: clock: add Amlogic C3 peripherals " Xianwei Zhao
2023-11-10 13:24 ` Krzysztof Kozlowski [this message]
2023-11-14 8:49 ` Xianwei Zhao
2023-11-06 8:55 ` [PATCH V6 3/4] clk: meson: c3: add support for the C3 SoC PLL clock Xianwei Zhao
2023-11-14 10:25 ` Jerome Brunet
2023-11-14 12:25 ` Chuan Liu
2023-11-15 8:00 ` Xianwei Zhao
2023-11-06 8:55 ` [PATCH V6 4/4] clk: meson: c3: add c3 clock peripherals controller driver Xianwei Zhao
2023-11-14 10:39 ` Jerome Brunet
2023-11-10 13:20 ` [PATCH V6 0/4] Add C3 SoC PLLs and Peripheral clock Krzysztof Kozlowski
2023-11-10 17:50 ` Jerome Brunet
2023-11-14 13:07 ` Jerome Brunet
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