From: Diederik de Haas <didi.debian@cknow.org>
To: linux-rockchip@lists.infradead.org
Cc: heiko@sntech.de, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
Anand Moon <linux.amoon@gmail.com>,
Dragan Simic <dsimic@manjaro.org>
Subject: Re: [PATCH] arm64: dts: rockchip: Add cache information to the SoC dtsi for RK356x
Date: Fri, 08 Mar 2024 23:48:18 +0100 [thread overview]
Message-ID: <90122541.GozVr7r7Y5@bagend> (raw)
In-Reply-To: <2285ee41e165813011220f9469e28697923aa6e0.1709491108.git.dsimic@manjaro.org>
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On Sunday, 3 March 2024 20:04:50 CET Dragan Simic wrote:
> Add missing cache information to the Rockchip RK356x SoC dtsi, to allow
> the userspace, which includes /proc/cpuinfo and lscpu(1), to present proper
> RK3566 and RK3568 cache information. Also, it gets rid of the following
> error in the kernel log:
>
> cacheinfo: Unable to detect cache hierarchy for CPU 0
I tried it out on my PineTab2 (rk3566) and while I didn't see any change in
`/proc/cpuinfo`, I did see a/the change in `lscpu` and the above quoted
warning is now gone. Thanks :-)
Tested-By: Diederik de Haas <didi.debian@cknow.org>
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next prev parent reply other threads:[~2024-03-08 22:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-03 19:04 [PATCH] arm64: dts: rockchip: Add cache information to the SoC dtsi for RK356x Dragan Simic
2024-03-04 9:21 ` Anand Moon
2024-03-04 13:12 ` Dragan Simic
2024-03-08 22:48 ` Diederik de Haas [this message]
2024-03-09 3:33 ` Dragan Simic
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