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Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lX3GN-008fBr-Hp for linux-arm-kernel@lists.infradead.org; Thu, 15 Apr 2021 14:46:36 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C8F7F106F; Thu, 15 Apr 2021 07:46:34 -0700 (PDT) Received: from [10.57.57.112] (unknown [10.57.57.112]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B2EC63F73B; Thu, 15 Apr 2021 07:46:32 -0700 (PDT) Subject: Re: [PATCH v4 4/6] perf arm-spe: Assign kernel time to synthesized event To: Leo Yan , Arnaldo Carvalho de Melo , Al Grant , John Garry , Will Deacon , Mathieu Poirier , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20210412091006.468557-1-leo.yan@linaro.org> <20210412091006.468557-5-leo.yan@linaro.org> From: James Clark Message-ID: <9036368a-e824-3d63-da5b-54cf32a86aed@arm.com> Date: Thu, 15 Apr 2021 17:46:31 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210412091006.468557-5-leo.yan@linaro.org> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210415_074635_665041_2507B558 X-CRM114-Status: GOOD ( 24.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/04/2021 12:10, Leo Yan wrote: > In current code, it assigns the arch timer counter to the synthesized > samples Arm SPE trace, thus the samples don't contain the kernel time > but only contain the raw counter value. > > To fix the issue, this patch converts the timer counter to kernel time > and assigns it to sample timestamp. > > Signed-off-by: Leo Yan > --- > tools/perf/util/arm-spe.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c > index 23714cf0380e..c13a89f06ab8 100644 > --- a/tools/perf/util/arm-spe.c > +++ b/tools/perf/util/arm-spe.c > @@ -234,7 +234,7 @@ static void arm_spe_prep_sample(struct arm_spe *spe, > struct arm_spe_record *record = &speq->decoder->record; > > if (!spe->timeless_decoding) > - sample->time = speq->timestamp; > + sample->time = tsc_to_perf_time(record->timestamp, &spe->tc); I noticed that in arm_spe_recording_options() the TIME sample bit is set regardless of any options. I don't know of a way to remove this, and if there isn't, does that mean that all the code in this file that looks at spe->timeless_decoding is untested and has never been hit? Unless there is a way to get a perf file with only the AUXTRACE event and no others? I think that one might have no timestamp set. Otherwise other events will always have timestamps so spe->timeless_decoding is always false. > > sample->ip = record->from_ip; > sample->cpumode = arm_spe_cpumode(spe, sample->ip); > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel