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X-IronPort-AV: E=Sophos;i="5.97,304,1669071600"; d="scan'208";a="29152556" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 17 Feb 2023 11:05:16 +0100 Received: from steina-w.localnet (unknown [10.123.53.21]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 120AA280056; Fri, 17 Feb 2023 11:05:16 +0100 (CET) From: Alexander Stein To: Rasmus Villemoes Cc: Fabio Estevam , dri-devel@lists.freedesktop.org, Marek Vasut , linux-samsung-soc@vger.kernel.org, matteo.lisi@engicam.com, aford173@gmail.com, dri-devel@lists.freedesktop.org, sw0312.kim@samsung.com, linux-imx@nxp.com, Frieder Schrempf , kyungmin.park@samsung.com, Jagan Teki , andrzej.hajda@intel.com, m.szyprowski@samsung.com, linux-amarula@amarulasolutions.com, linux-arm-kernel@lists.infradead.org, Laurent.pinchart@ideasonboard.com Subject: Re: [PATCH v12 00/18] drm: Add Samsung MIPI DSIM bridge Date: Fri, 17 Feb 2023 11:05:15 +0100 Message-ID: <9068722.CDJkKcVGEf@steina-w> Organization: TQ-Systems GmbH In-Reply-To: <25ae1824-4f00-4337-4512-0d8190981fb6@prevas.dk> References: <20230126144427.607098-1-jagan@amarulasolutions.com> <25ae1824-4f00-4337-4512-0d8190981fb6@prevas.dk> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230217_020531_990457_6AA53C42 X-CRM114-Status: GOOD ( 31.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Am Freitag, 17. Februar 2023, 09:55:22 CET schrieb Rasmus Villemoes: > On 14/02/2023 12.09, Fabio Estevam wrote: > > Hi Rasmus, > > = > > On Tue, Feb 14, 2023 at 7:55 AM Rasmus Villemoes > > = > > wrote: > >> Well, the data sheet for the dsi86 says up to 750MHz DSI HS clock, and > >> if the value specified in samsung,burst-clock-frequency is twice the D= SI > >> HS clk, I suppose I should be good up to 1.5GHz? I have tried many > >> different values, but I never seem to get anything through; I think I'm > >> missing some piece. > >> = > >> So now I've tried to use these patches on the imx8mp-evk with the > >> mipi->hdmi accessory from NXP, just to see if I can ever get any > >> graphics through the mipi interface. And there the story is the same: > >> the adv7535 bridge gets probed, and can read out the edid from the > >> monitor over hdmi. And while the mipi block and the bridge seem to > >> attach to each other, I still don't get any output. > >> = > >> Do any of you happen to have this working on the imx8mp-evk, and if so, > >> can you share the .dts updates you've done and how exactly you test the > >> graphics? > > = > > I don't have access to an imx8mp-evk, but I tested the ADV7535 MIPI to > > HDMI daughter card on an imx8mm-evk. > > = > > Some extra ADV7535 patches were needed. Please check patches 0020-0023 > > and see if they help. > = > Thanks, but they don't seem to make a difference. > = > I've started trying to simply compare registers between the NXP 5.15 > kernel and the imx8mm-dsi-v12 branch with Marek's patch on top. Already > in MEDIA_BLK_CTRL, 0x32ec0000, there's something interesting: > = > ## Media Mix Clock Enable Register > -CLK_EN 0004 0080e133 > +CLK_EN 0004 00800133 > ## MIPI PHY Control Register > -MIPI_RESET_DIV 0008 40030000 > +MIPI_RESET_DIV 0008 00020000 > = > So with the NXP kernel, there are three bits set in CLK_EN which are not > set with the "mainline", but those bits are marked reserved in the RM, > so I have no idea if they are just some RO bits that get set due to some > other munging. Then there's the MIPI_RESET_DIV register where bits 16 > and 30 do not get set. Of course, there are lots of other differences, > but perhaps this gives somebody an idea. Looking at drivers/soc/imx/imx8m-blk-ctrl.c the bits for MIPI_RESET_DIV are 16: MIPI_CSI1 17: MIPI_DSI 30: MIPI_CSI2 So i think that's okay here. Best regards, Alexander -- = TQ-Systems GmbH | M=FChlstra=DFe 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht M=FCnchen, HRB 105018 Gesch=E4ftsf=FChrer: Detlef Schneider, R=FCdiger Stahl, Stefan Schneider http://www.tq-group.com/ _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel