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Sat, 06 Apr 2024 01:29:24 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 4361T9G3026757 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 6 Apr 2024 01:29:09 GMT Received: from [10.47.206.1] (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Fri, 5 Apr 2024 18:29:07 -0700 Message-ID: <907632cd-ce3e-4868-92c8-8a79d09fa011@quicinc.com> Date: Fri, 5 Apr 2024 18:29:07 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 7/7] spmi: pmic-arb: Add multi bus support Content-Language: en-US To: Abel Vesa , Stephen Boyd , Matthias Brugger , Bjorn Andersson , Konrad Dybcio , Dmitry Baryshkov , Neil Armstrong , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Srini Kandagatla , Johan Hovold , , , , , References: <20240402-spmi-multi-master-support-v8-0-ce6f2d14a058@linaro.org> <20240402-spmi-multi-master-support-v8-7-ce6f2d14a058@linaro.org> From: David Collins In-Reply-To: <20240402-spmi-multi-master-support-v8-7-ce6f2d14a058@linaro.org> X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: DzLzYEJ86RzxmAT8-h-u_ubXkHxLSS4A X-Proofpoint-ORIG-GUID: DzLzYEJ86RzxmAT8-h-u_ubXkHxLSS4A X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-05_31,2024-04-05_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 mlxlogscore=754 malwarescore=0 suspectscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404060010 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240405_182931_334524_B9B96617 X-CRM114-Status: GOOD ( 10.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 4/2/24 05:07, Abel Vesa wrote: > +static void spmi_pmic_arb_deregister_buses(struct spmi_pmic_arb *pmic_arb) > +{ > + int i; > + > + for (i = 0; i < PMIC_ARB_MAX_BUSES; i++) { s/PMIC_ARB_MAX_BUSES/pmic_arb->buses_available/ This is needed to avoid a NULL pointer dereference in the case that a single SPMI bus is specified in DT and then removed at runtime. > + struct spmi_pmic_arb_bus *bus = pmic_arb->buses[i]; > + > + irq_set_chained_handler_and_data(bus->irq, > + NULL, NULL); > + irq_domain_remove(bus->domain); > + } > +} Thanks, David Collins _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel