[PATCH 0/2] Enable CMU_PERIS and MCT for Exynos990

[PATCH 0/2] Enable CMU_PERIS and MCT for Exynos990

[Igor Belwon]

Hi all!

This series enables a new clock block and the MCT for the Exynos990 SoC.
The MCT design is reused from previous SoCs. It generates 12 timer
interrupts.

Compile-time and run-time dependency:
[CMU_PERI] https://lore.kernel.org/linux-samsung-soc/20250104-exynos990-cmu-v1-0-9f54d69286d6@mentallysanemainliners.org/

Best regards
Igor

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
---
Igor Belwon (2):
      dt-bindings: timer: exynos4210-mct: Add samsung,exynos990-mct compatible
      arm64: dts: exynos990: Add CMU_PERIS and MCT nodes

 .../bindings/timer/samsung,exynos4210-mct.yaml     |  2 ++
 arch/arm64/boot/dts/exynos/exynos990.dtsi          | 30 ++++++++++++++++++++++
 2 files changed, 32 insertions(+)
---
base-commit: 77c5a1c131c3e0c955965b94365e0e7727b37dc5
change-id: 20250104-cmu-nodes-5cfbd7c95f12

Best regards,
-- 
Igor Belwon <igor.belwon@mentallysanemainliners.org>

[PATCH 1/2] dt-bindings: timer: exynos4210-mct: Add samsung,exynos990-mct compatible

[Igor Belwon]

Add a dedicated compatible for the MCT of the Exynos 990 SoC.
The design for the timer is reused from previous SoCs.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
---
 Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
index 02d1c355808e4eadd77b98247cd70e76aea72b21..12ff972bfefcc5dcef2a38582e963ea49a567d18 100644
--- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
+++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
@@ -34,6 +34,7 @@ properties:
               - samsung,exynos5433-mct
               - samsung,exynos850-mct
               - samsung,exynos8895-mct
+              - samsung,exynos990-mct
               - tesla,fsd-mct
           - const: samsung,exynos4210-mct
 
@@ -135,6 +136,7 @@ allOf:
               - samsung,exynos5433-mct
               - samsung,exynos850-mct
               - samsung,exynos8895-mct
+              - samsung,exynos990-mct
     then:
       properties:
         interrupts:

-- 
2.45.2

Re: [PATCH 1/2] dt-bindings: timer: exynos4210-mct: Add samsung,exynos990-mct compatible

[Krzysztof Kozlowski]

On Sat, Jan 04, 2025 at 09:54:16PM +0100, Igor Belwon wrote:
> Add a dedicated compatible for the MCT of the Exynos 990 SoC.
> The design for the timer is reused from previous SoCs.
> 
> Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
> ---
>  Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

Re: [PATCH 1/2] dt-bindings: timer: exynos4210-mct: Add samsung,exynos990-mct compatible

[Daniel Lezcano]

On 04/01/2025 21:54, Igor Belwon wrote:
> Add a dedicated compatible for the MCT of the Exynos 990 SoC.
> The design for the timer is reused from previous SoCs.
> 
> Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
> ---

Applied patch 1/2

Thanks

   -- Daniel



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Re: [PATCH 1/2] dt-bindings: timer: exynos4210-mct: Add samsung,exynos990-mct compatible

[Krzysztof Kozlowski]

On 08/01/2025 17:40, Daniel Lezcano wrote:
> On 04/01/2025 21:54, Igor Belwon wrote:
>> Add a dedicated compatible for the MCT of the Exynos 990 SoC.
>> The design for the timer is reused from previous SoCs.
>>
>> Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
>> ---
> 
> Applied patch 1/2
> 

Hi Daniel,

Did this really happen? You replied month ago, but linux-next still does
not have this patch and now we got new warnings on next:

https://lore.kernel.org/all/202502070055.P29PYKEE-lkp@intel.com/

Best regards,
Krzysztof

Re: [PATCH 1/2] dt-bindings: timer: exynos4210-mct: Add samsung,exynos990-mct compatible

[Daniel Lezcano]

On 09/02/2025 12:14, Krzysztof Kozlowski wrote:
> On 08/01/2025 17:40, Daniel Lezcano wrote:
>> On 04/01/2025 21:54, Igor Belwon wrote:
>>> Add a dedicated compatible for the MCT of the Exynos 990 SoC.
>>> The design for the timer is reused from previous SoCs.
>>>
>>> Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
>>> ---
>>
>> Applied patch 1/2
>>
> 
> Hi Daniel,
> 
> Did this really happen? You replied month ago, but linux-next still does
> not have this patch and now we got new warnings on next:

Hi Krzysztof,

thanks for pointing this out. Actually I forgot to push the branch :/




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<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

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[PATCH 2/2] arm64: dts: exynos990: Add CMU_PERIS and MCT nodes

[Igor Belwon]

CMU_PERIS is a new clock controller that clocks the MCT. The MCT has 9
timers (1x count-up global timer, 8x count-down CPU local).
The global timer generates 4 interrupts, and each local timer
generates one interrupt. So, in total 12 interrupts.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
---
 arch/arm64/boot/dts/exynos/exynos990.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi
index 9d017dbed9523e874891f13258d331c3e829ca03..0e18711cbdc98a65cbd2d709cdd53a7680b833f2 100644
--- a/arch/arm64/boot/dts/exynos/exynos990.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi
@@ -181,6 +181,36 @@ chipid@10000000 {
 			reg = <0x10000000 0x100>;
 		};
 
+		cmu_peris: clock-controller@10020000 {
+			compatible = "samsung,exynos990-cmu-peris";
+			reg = <0x10020000 0x8000>;
+			#clock-cells = <1>;
+
+			clocks = <&oscclk>,
+				 <&cmu_top CLK_DOUT_CMU_PERIS_BUS>;
+			clock-names = "oscclk", "bus";
+		};
+
+		timer@10040000 {
+			compatible = "samsung,exynos990-mct",
+				     "samsung,exynos4210-mct";
+			reg = <0x10040000 0x800>;
+			clocks = <&oscclk>, <&cmu_peris CLK_GOUT_PERIS_MCT_PCLK>;
+			clock-names = "fin_pll", "mct";
+			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		gic: interrupt-controller@10101000 {
 			compatible = "arm,gic-400";
 			reg = <0x10101000 0x1000>,

-- 
2.45.2