From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Sibi Sankar <quic_sibis@quicinc.com>,
andersson@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, catalin.marinas@arm.com,
ulf.hansson@linaro.org
Cc: agross@kernel.org, conor+dt@kernel.org,
ayan.kumar.halder@amd.com, j@jannau.net,
dmitry.baryshkov@linaro.org, nfraprado@collabora.com,
m.szyprowski@samsung.com, u-kumar1@ti.com, peng.fan@nxp.com,
lpieralisi@kernel.org, quic_rjendra@quicinc.com,
abel.vesa@linaro.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, quic_tsoni@quicinc.com,
neil.armstrong@linaro.org
Subject: Re: [PATCH V2 3/5] arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts
Date: Sat, 18 Nov 2023 02:06:18 +0100 [thread overview]
Message-ID: <918ff1f5-ce01-43ea-b034-e69fbb31f495@linaro.org> (raw)
In-Reply-To: <20231117113931.26660-4-quic_sibis@quicinc.com>
On 17.11.2023 12:39, Sibi Sankar wrote:
> From: Rajendra Nayak <quic_rjendra@quicinc.com>
>
> Add base dtsi and QCP board (Qualcomm Compute Platform) dts file for
> X1E80100 SoC, describing the CPUs, GCC and RPMHCC clock controllers,
> geni UART, interrupt controller, TLMM, reserved memory, interconnects,
> SMMU and LLCC nodes.
>
> Co-developed-by: Abel Vesa <abel.vesa@linaro.org>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
[...]
> +&tlmm {
> + gpio-reserved-ranges = <33 3>, <44 4>, /* SPI (TPM) */
Surely SPI doesn't use 7 wires! :D
[...]
> + L2_0: l2-cache-0 {
the cache device is distinguishable by its parent, so "l2-cache" is enough
> + compatible = "cache";
> + cache-level = <2>;
> + cache-unified;
> + };
> + };
> +
[...]
> + idle-states {
> + entry-method = "psci";
> +
> + CLUSTER_C4: cpu-sleep-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "ret";
> + arm,psci-suspend-param = <0x00000004>;
These suspend parameters look funky.. is this just a PSCI sleep
implementation that strays far away from Arm's suggested guidelines?
[...]
> + CPU_PD11: power-domain-cpu11 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + };
> +
> + CLUSTER_PD: power-domain-cpu-cluster {
> + #power-domain-cells = <0>;
> + domain-idle-states = <&CLUSTER_CL4>, <&CLUSTER_CL5>;
> + };
So, can the 3 clusters not shut down their L2 and PLLs (if separate?)
on their own?
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gunyah_hyp_mem: gunyah-hyp@80000000 {
> + reg = <0x0 0x80000000 0x0 0x800000>;
> + no-map;
> + };
> +
> + hyp_elf_package_mem: hyp-elf_package@80800000 {
no underscores in node names, use hyphens
The rest looks OK I think
Konrad
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next prev parent reply other threads:[~2023-11-18 1:06 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-17 11:39 [PATCH V2 0/5] dts: qcom: Introduce X1E80100 platforms device tree Sibi Sankar
2023-11-17 11:39 ` [PATCH V2 1/5] dt-bindings: arm: cpus: Add qcom,oryon compatible Sibi Sankar
2023-11-19 15:59 ` Rob Herring
2023-11-20 6:44 ` Sibi Sankar
2023-11-29 10:37 ` Sibi Sankar
2023-11-17 11:39 ` [PATCH V2 2/5] dt-bindings: arm: qcom: Document X1E80100 SoC and boards Sibi Sankar
2023-11-20 9:11 ` Krzysztof Kozlowski
2023-11-17 11:39 ` [PATCH V2 4/5] arm64: dts: qcom: x1e80100: Add Compute Reference Device Sibi Sankar
2023-11-18 1:07 ` Konrad Dybcio
2023-11-20 6:51 ` Sibi Sankar
2023-11-20 11:54 ` Konrad Dybcio
2023-11-20 9:04 ` Abel Vesa
2023-11-17 11:39 ` [PATCH V2 5/5] arm64: defconfig: Enable X1E80100 SoC base configs Sibi Sankar
2023-11-20 9:12 ` Krzysztof Kozlowski
[not found] ` <20231117113931.26660-4-quic_sibis@quicinc.com>
2023-11-18 1:06 ` Konrad Dybcio [this message]
2023-11-29 9:25 ` [PATCH V2 3/5] arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts Sibi Sankar
2023-11-29 12:54 ` Konrad Dybcio
2023-11-29 15:46 ` Sibi Sankar
2023-11-29 22:29 ` Konrad Dybcio
2023-11-30 11:23 ` Sibi Sankar
2023-11-21 7:20 ` kernel test robot
2023-11-21 14:03 ` kernel test robot
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