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Received: from AM7PR04MB7046.eurprd04.prod.outlook.com (2603:10a6:20b:113::22) by PA4PR04MB9439.eurprd04.prod.outlook.com (2603:10a6:102:2ab::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8699.21; Wed, 7 May 2025 07:18:24 +0000 Received: from AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90]) by AM7PR04MB7046.eurprd04.prod.outlook.com ([fe80::d1ce:ea15:6648:6f90%4]) with mapi id 15.20.8699.026; Wed, 7 May 2025 07:18:24 +0000 Message-ID: <9253e2cb-8e39-4b3b-adb2-48a9693a6e5f@nxp.com> Date: Wed, 7 May 2025 15:19:51 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 00/19] Add Freescale i.MX8qxp Display Controller support From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, tglx@linutronix.de, vkoul@kernel.org, kishon@kernel.org, Frank.Li@nxp.com, lumag@kernel.org, aisheng.dong@nxp.com, agx@sigxcpu.org, u.kleine-koenig@baylibre.com, francesco@dolcini.it, dmitry.baryshkov@linaro.org References: <20250414035028.1561475-1-victor.liu@nxp.com> Content-Language: en-US In-Reply-To: <20250414035028.1561475-1-victor.liu@nxp.com> Content-Type: text/plain; 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Split the display controller into multiple internal devices. > 1) List display engine, pixel engine, interrupt controller and more as the > controller's child devices. > 2) List display engine and pixel engine's processing units as their child > devices. > > b. Add minimal feature support. > Only support two display pipelines with primary planes with XR24 fb, > backed by two fetchunits. No fetchunit dynamic allocation logic(to be done > when necessary). > > c. Use drm_dev_{enter, exit}(). > > Since this series changes a lot comparing to the previous one, I choose to > send it with a new patch series, not a new version. > > To follow up i.MX8qxp TRM, I changed the controller name to "Display Controller" > instead of the previous "DPU". "DPU" is only mentioned in the SoC block > diagram and represents the whole display subsystem which includes the display > controller and prefech engines, etc. > > With an additional patch[1] for simple-pm-bus.c, this series facilitates > testing a LVDS panel on i.MX8qxp MEK. > > Please do NOT merge patch 14-19. They are only used to facilitate testing > the LVDS panel. > > Maxime, patch 1-13 have already been reviewed by maintainers, can you please > consider to land patch 1-13? Gentle ping. Do you think it's ok to land patch 1-13? I may try to push them to drm/misc if needed. > > [1] https://lkml.org/lkml/2023/1/25/120 > > v9: > * Rebase on v6.15-rc1. > * Collect Rob's R-b tag on patch 6. > * Collect Dmitry's R-b tags on patch 9&10. > * Collect Maxime's R-b tag on patch 13. > > v8: > * Drop instance numbers from display controller internal devices' compatible > strings. This means switching back to patches for DT bindings in v4. So, add > Rob's previous R-b tags back on patches for DT bindings. (Dmitry) > * Get display controller internal device instance numbers through register > start addresses of the devices in patch 9&10, instead of compatible strings. > (Dmitry) > * s/shdld/shdload/ for IRQs in patch 9/10/12. (Dmitry) > * Drop dc_plane_check_no_off_screen() from patch 12. (Dmitry) > * Drop id member from struct dc_de from patch 9. (Dmitry) > * Add dc_{de,pe}_post_bind() to patch 9&10, to avoid dependency on the > component helper's way of implementing component binding order. (Dmitry) > * Add dev_warn() to dc_lb_pec_dynamic_{prim,sec}_sel() in patch 10. (Dmitry) > * Drop lb_links[] and dc_fetchunit_all_fracs[] arrays from patch 10. (Dmitry) > * Collect Dmitry's R-b tags on patch 11&12. > > v7: > * Drop using DT aliases for display controller internal devices and add > instance numbers to display controller internal devices' compatible > strings. Drop Rob's R-b tags on some DT bindings patches. (Rob) > * Drop using typeof in macros and explicitly define variable types in patch 12. > (Dmitry) > * Add a comment for disable_irq_nosync() to explain why _nosync in patch 12. > (Dmitry) > * Inline dc_crtc_check_clock() in patch 12. (Dmitry) > * Use global drm_dc->pe in patch 12. (Dmitry) > * Drop dc_crtc_disable_at_unbind() from KMS driver in patch 12. (Dmitry) > * Add kernel doc for struct dc_{crtc,drm_device,plane} in patch 9/10/12. > (Dmitry) > * Define common IRQ handlers separately for each IRQs in patch 12. (Dmitry) > * Rebase this series upon next-20241220, so drop date entry from drm_driver > and correctly include drm/clients/drm_client_setup.h. > * Fix regmap_config definitions for display controller internal device drivers > in patch 9/10/11 by correcting name field, correcting read ranges and setting > max_register field. > * Get instance numbers from device data(compatible strings) instead of OF > aliases in display controller internal device drivers in patch 9/10/11. > * Collect Maxime's R-b tags on interrupt controller driver and display drivers. > * Trivial tweaks. > > v6: > * Fix build warning by expanding sizeof(fu->name) from 13 to 21 in patch 10. > (kernel test robot) > > v5: > * Document display controller device's and some display controller internal > devices' aliases in DT bindings. Hence, drop collected R-b tags from some > patches for DT bindings. (Maxime) > * Replace .remove_new with .remove in all drivers. (Uwe) > * Select REGMAP and REGMAP_MMIO options in patch 9. > * Fix patch 9 & 10's commit message to state that display engine driver and > pixel engine driver are component drivers instead of master/aggregate drivers. > > v4: > * Collect Rob's R-b tags on DT binding patches(patch 1-5). > * Replace "fsl,iram" property with standard "sram" property in > fsl,imx8qxp-dc-command-sequencer.yaml in patch 6. (Rob) > * Use regmap to define register map for all registers. (Dmitry) > * Use regmap APIs to access registers. (Dmitry) > * Inline some small functions. (Dmitry) > * Move dc_fg_displaymode(), dc_fg_panic_displaymode() and dc_lb_blendcontrol() > function calls from KMS routine to initialization stage. (Dmitry) > * Drop dc-crtc.h and dc-plane.h header files and move relevant defines to > appropriate .h header files or .c source files. (Dmitry) > * Drop futile "else" clause from dc_crtc_common_irq_handler(). (Dmitry) > * Drop dc_drm->pe_rpm_count. (Dmitry) > * Drop DC_{CRTCS,ENCODERS,PRIMARYS} macros and only use DC_DISPLAYS. (Dmitry) > * Drop drmm_kcalloc() function call to allocate an array for storing IRQs. > Instead, put it in struct dc_crtc. (Dmitry) > * Call devm_request_irq() to request IRQs, instead of using drmm action. > (Dmitry) > * Call devm_drm_of_get_bridge() to find the next bridge. (Dmitry) > * Select DRM_CLIENT_SELECTION due to rebase. > * Select the missing DRM_DISPLAY_HELPER and DRM_BRIDGE_CONNECTOR. > * Use devm_kzalloc() to drmm_kzalloc() to allocate dc_* data strutures. > * Drop unnecessary private struct dc_*_priv from DC internal device drivers. > * Set suppress_bind_attrs driver flag to true in DC internal device drivers > to avoid unnecessary sys interfaces to bind/unbind the drivers. > * Make some fetch unit operations be aware of fractional fetch unit index(0-7). > * Take DC interrupt controller driver as a standalone driver instead of a > component driver. > * Replace drmm_kcalloc() with devm_kcalloc() to allocate an array for > struct dc_ic_entry. > * Call platform_get_irq() from DC interrupt controller driver to make sure > parent interrupt controller driver is probed first. > * Use DRM_FBDEV_DMA_DRIVER_OPS due to rebase. > * Replace drm_fbdev_dma_setup() with drm_client_setup_with_fourcc() due to > rebase. > * Replace drmm_add_action_or_reset() with devm_add_action_or_reset() to > register dc_drm_component_unbind_all() action. > * Request interrupts in dc_crtc_post_init() after encoder initialization to > make sure next bridge is found first. > * Trivial tweaks. > > v3: > * Collect Rob's R-b tag on the patch for adding fsl,imx8qxp-dc-intc.yaml. > * Combine fsl,imx8qxp-dc-fetchunit-common.yaml, > fsl,imx8qxp-dc-fetchlayer.yaml and fsl,imx8qxp-dc-fetchwarp.yaml > into 1 schema doc fsl,imx8qxp-dc-fetchunit.yaml. (Rob) > * Document all processing units, command sequencer, axi performance counter > and blit engine. (Rob) > > v2: > * Drop fsl,dc-*-id DT properties from fsl,imx8qxp-dc*.yaml. (Krzysztof) > * Move port property from fsl,imx8qxp-dc-display-engine.yaml to > fsl,imx8qxp-dc-tcon.yaml. (Krzysztof) > * Drop unneeded "|" from fsl,imx8qxp-dc-intc.yaml. (Krzysztof) > * Use generic pmu pattern property in fsl,imx8qxp-dc.yaml. (Krzysztof) > * Fix register range size in fsl,imx8qxp-dc*.yaml. > * Use OF alias id to get instance id from display driver. > * Find next bridge from TCon's port from display driver. > * Drop drm/drm_module.h include from dc-drv.c. > * Improve file list in MAINTAINERS. (Frank) > * Add entire i.MX8qxp display controller device tree for review. (Krzysztof) > * Add MIPI/LVDS subsystems device tree and a DT overlay for imx8qxp > MEK to test a LVDS panel as an example. (Francesco) > > Liu Ying (19): > dt-bindings: display: imx: Add i.MX8qxp Display Controller processing > units > dt-bindings: display: imx: Add i.MX8qxp Display Controller blit engine > dt-bindings: display: imx: Add i.MX8qxp Display Controller display > engine > dt-bindings: display: imx: Add i.MX8qxp Display Controller pixel > engine > dt-bindings: display: imx: Add i.MX8qxp Display Controller AXI > performance counter > dt-bindings: display: imx: Add i.MX8qxp Display Controller command > sequencer > dt-bindings: interrupt-controller: Add i.MX8qxp Display Controller > interrupt controller > dt-bindings: display: imx: Add i.MX8qxp Display Controller > drm/imx: Add i.MX8qxp Display Controller display engine > drm/imx: Add i.MX8qxp Display Controller pixel engine > drm/imx: Add i.MX8qxp Display Controller interrupt controller > drm/imx: Add i.MX8qxp Display Controller KMS > MAINTAINERS: Add maintainer for i.MX8qxp Display Controller > dt-bindings: phy: mixel, mipi-dsi-phy: Allow assigned-clock* > properties > dt-bindings: firmware: imx: Add SCU controlled display pixel link > nodes > arm64: dts: imx8qxp: Add display controller subsystem > arm64: dts: imx8qxp: Add MIPI-LVDS combo subsystems > arm64: dts: imx8qxp-mek: Enable display controller > arm64: dts: imx8qxp-mek: Add MX8-DLVDS-LCD1 display module support > > ...sl,imx8qxp-dc-axi-performance-counter.yaml | 57 ++ > .../imx/fsl,imx8qxp-dc-blit-engine.yaml | 204 +++++++ > .../display/imx/fsl,imx8qxp-dc-blitblend.yaml | 41 ++ > .../display/imx/fsl,imx8qxp-dc-clut.yaml | 44 ++ > .../imx/fsl,imx8qxp-dc-command-sequencer.yaml | 67 +++ > .../imx/fsl,imx8qxp-dc-constframe.yaml | 44 ++ > .../imx/fsl,imx8qxp-dc-display-engine.yaml | 152 +++++ > .../display/imx/fsl,imx8qxp-dc-dither.yaml | 45 ++ > .../display/imx/fsl,imx8qxp-dc-extdst.yaml | 72 +++ > .../display/imx/fsl,imx8qxp-dc-fetchunit.yaml | 141 +++++ > .../display/imx/fsl,imx8qxp-dc-filter.yaml | 43 ++ > .../display/imx/fsl,imx8qxp-dc-framegen.yaml | 64 ++ > .../display/imx/fsl,imx8qxp-dc-gammacor.yaml | 32 + > .../imx/fsl,imx8qxp-dc-layerblend.yaml | 39 ++ > .../display/imx/fsl,imx8qxp-dc-matrix.yaml | 44 ++ > .../imx/fsl,imx8qxp-dc-pixel-engine.yaml | 250 ++++++++ > .../display/imx/fsl,imx8qxp-dc-rop.yaml | 43 ++ > .../display/imx/fsl,imx8qxp-dc-safety.yaml | 34 ++ > .../imx/fsl,imx8qxp-dc-scaling-engine.yaml | 83 +++ > .../display/imx/fsl,imx8qxp-dc-signature.yaml | 53 ++ > .../display/imx/fsl,imx8qxp-dc-store.yaml | 96 +++ > .../display/imx/fsl,imx8qxp-dc-tcon.yaml | 45 ++ > .../bindings/display/imx/fsl,imx8qxp-dc.yaml | 236 ++++++++ > .../devicetree/bindings/firmware/fsl,scu.yaml | 20 + > .../fsl,imx8qxp-dc-intc.yaml | 318 ++++++++++ > .../bindings/phy/mixel,mipi-dsi-phy.yaml | 5 - > MAINTAINERS | 8 + > arch/arm64/boot/dts/freescale/Makefile | 2 + > .../arm64/boot/dts/freescale/imx8-ss-dc0.dtsi | 408 +++++++++++++ > .../imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd.dtso | 183 ++++++ > arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 34 ++ > .../boot/dts/freescale/imx8qxp-ss-dc.dtsi | 240 ++++++++ > .../dts/freescale/imx8qxp-ss-mipi-lvds.dtsi | 437 ++++++++++++++ > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +- > drivers/gpu/drm/imx/Kconfig | 1 + > drivers/gpu/drm/imx/Makefile | 1 + > drivers/gpu/drm/imx/dc/Kconfig | 13 + > drivers/gpu/drm/imx/dc/Makefile | 7 + > drivers/gpu/drm/imx/dc/dc-cf.c | 172 ++++++ > drivers/gpu/drm/imx/dc/dc-crtc.c | 555 ++++++++++++++++++ > drivers/gpu/drm/imx/dc/dc-de.c | 177 ++++++ > drivers/gpu/drm/imx/dc/dc-de.h | 59 ++ > drivers/gpu/drm/imx/dc/dc-drv.c | 293 +++++++++ > drivers/gpu/drm/imx/dc/dc-drv.h | 102 ++++ > drivers/gpu/drm/imx/dc/dc-ed.c | 288 +++++++++ > drivers/gpu/drm/imx/dc/dc-fg.c | 376 ++++++++++++ > drivers/gpu/drm/imx/dc/dc-fl.c | 185 ++++++ > drivers/gpu/drm/imx/dc/dc-fu.c | 258 ++++++++ > drivers/gpu/drm/imx/dc/dc-fu.h | 129 ++++ > drivers/gpu/drm/imx/dc/dc-fw.c | 222 +++++++ > drivers/gpu/drm/imx/dc/dc-ic.c | 282 +++++++++ > drivers/gpu/drm/imx/dc/dc-kms.c | 143 +++++ > drivers/gpu/drm/imx/dc/dc-kms.h | 131 +++++ > drivers/gpu/drm/imx/dc/dc-lb.c | 325 ++++++++++ > drivers/gpu/drm/imx/dc/dc-pe.c | 158 +++++ > drivers/gpu/drm/imx/dc/dc-pe.h | 101 ++++ > drivers/gpu/drm/imx/dc/dc-plane.c | 224 +++++++ > drivers/gpu/drm/imx/dc/dc-tc.c | 141 +++++ > 58 files changed, 7928 insertions(+), 6 deletions(-) > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blit-engine.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-blitblend.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-clut.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-constframe.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-display-engine.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-dither.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-extdst.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-fetchunit.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-filter.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-framegen.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-gammacor.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-layerblend.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-matrix.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-pixel-engine.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-rop.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-safety.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-signature.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-store.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-tcon.yaml > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc.yaml > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,imx8qxp-dc-intc.yaml > create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-dc0.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-mek-mx8-dlvds-lcd1-lvds0-odd.dtso > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-dc.dtsi > create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ss-mipi-lvds.dtsi > create mode 100644 drivers/gpu/drm/imx/dc/Kconfig > create mode 100644 drivers/gpu/drm/imx/dc/Makefile > create mode 100644 drivers/gpu/drm/imx/dc/dc-cf.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-crtc.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-de.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-de.h > create mode 100644 drivers/gpu/drm/imx/dc/dc-drv.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-drv.h > create mode 100644 drivers/gpu/drm/imx/dc/dc-ed.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-fg.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-fl.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-fu.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-fu.h > create mode 100644 drivers/gpu/drm/imx/dc/dc-fw.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-ic.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-kms.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-kms.h > create mode 100644 drivers/gpu/drm/imx/dc/dc-lb.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-pe.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-pe.h > create mode 100644 drivers/gpu/drm/imx/dc/dc-plane.c > create mode 100644 drivers/gpu/drm/imx/dc/dc-tc.c > -- Regards, Liu Ying