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Thu, 25 Nov 2021 05:15:15 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 25 Nov 2021 04:15:13 -0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Thu, 25 Nov 2021 20:15:12 +0800 Received: from mhfsdcap04 (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 25 Nov 2021 20:15:11 +0800 Message-ID: <926a0bb2ec2ad64ba579d38e761e1e97ba5bba3f.camel@mediatek.com> Subject: Re: [PATCH v4 10/12] ARM: dts: Add PCIe support for Airoha EN7523 From: Jianjun Wang To: Felix Fietkau , , "Rob Herring" , Matthias Brugger CC: , , , Date: Thu, 25 Nov 2021 20:15:11 +0800 In-Reply-To: <20211125110738.41028-11-nbd@nbd.name> References: <20211125110738.41028-1-nbd@nbd.name> <20211125110738.41028-11-nbd@nbd.name> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211125_041519_796501_0ABE9CD9 X-CRM114-Status: GOOD ( 18.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Felix, On Thu, 2021-11-25 at 12:07 +0100, Felix Fietkau wrote: > This uses the MediaTek MT7622 PCIe driver, since the PCIe IP block is > nearly > identical to the one in MT7622 > > Signed-off-by: Felix Fietkau > --- > arch/arm/boot/dts/en7523-evb.dts | 12 +++++++ > arch/arm/boot/dts/en7523.dtsi | 60 > ++++++++++++++++++++++++++++++++ > 2 files changed, 72 insertions(+) > > diff --git a/arch/arm/boot/dts/en7523-evb.dts > b/arch/arm/boot/dts/en7523-evb.dts > index e8e5c034cee7..af1a8dd40a41 100644 > --- a/arch/arm/boot/dts/en7523-evb.dts > +++ b/arch/arm/boot/dts/en7523-evb.dts > @@ -25,3 +25,15 @@ memory@80000000 { > reg = <0x80000000 0x20000000>; > }; > }; > + > +&pcie { > + status = "okay"; > +}; > + > +&pcie0 { > + status = "okay"; > +}; > + > +&pcie1 { > + status = "okay"; > +}; > diff --git a/arch/arm/boot/dts/en7523.dtsi > b/arch/arm/boot/dts/en7523.dtsi > index eabf3fdb3d52..d9bdb51614b5 100644 > --- a/arch/arm/boot/dts/en7523.dtsi > +++ b/arch/arm/boot/dts/en7523.dtsi > @@ -119,4 +119,64 @@ uart1: serial@1fbf0000 { > clock-frequency = <1843200>; > status = "okay"; > }; > + > + pcie: pcie@1a140000 { > + compatible = "airoha,en7523-pcie", "mediatek,mt7622- > pcie"; > + device_type = "pci"; > + reg = <0x1fa91000 0x1000>, > + <0x1fa92000 0x1000>; > + reg-names = "port0", "port1"; > + #address-cells = <3>; > + #size-cells = <2>; > + interrupts = , > + ; > + clocks = <&scu EN7523_CLK_PCIE>, > + <&scu EN7523_CLK_PCIE>; > + clock-names = "sys_ck0", "sys_ck1"; > + bus-range = <0x00 0xff>; > + ranges = <0x82000000 0 0x20000000 0x20000000 0 > 0x10000000>; > + status = "disabled"; > + > + pcie0: pcie@0,0 { > + device_type = "pci"; > + reg = <0x0000 0 0 0 0>; > + #address-cells = <3>; > + #size-cells = <2>; > + #interrupt-cells = <1>; > + ranges; > + status = "disabled"; > + > + interrupt-map-mask = <0 0 0 7>; > + interrupt-map = <0 0 0 1 &pcie_intc0 0>, > + <0 0 0 2 &pcie_intc0 1>, > + <0 0 0 3 &pcie_intc0 2>, > + <0 0 0 4 &pcie_intc0 3>; > + pcie_intc0: interrupt-controller { > + interrupt-controller; > + #address-cells = <0>; > + #interrupt-cells = <1>; > + }; > + }; > + > + pcie1: pcie@1,0 { > + device_type = "pci"; > + reg = <0x0800 0 0 0 0>; > + #address-cells = <3>; > + #size-cells = <2>; > + #interrupt-cells = <1>; > + ranges; > + status = "disabled"; > + > + interrupt-map-mask = <0 0 0 7>; > + interrupt-map = <0 0 0 1 &pcie_intc1 0>, > + <0 0 0 2 &pcie_intc1 1>, > + <0 0 0 3 &pcie_intc1 2>, > + <0 0 0 4 &pcie_intc1 3>; > + pcie_intc1: interrupt-controller { > + interrupt-controller; > + #address-cells = <0>; > + #interrupt-cells = <1>; > + }; > + }; > + }; There are some known issues with this device node style, please split the PCIe node into two independent nodes to comply with the hardware design. Here is the fix patch we sent before: https://lore.kernel.org/linux-pci/20210823032800.1660-6-chuanjia.liu@mediatek.com/ Thanks. > }; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel