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Tue, 14 Jul 2020 04:37:57 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 7976FC43395; Tue, 14 Jul 2020 04:37:57 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id B5890C433C8; Tue, 14 Jul 2020 04:37:56 +0000 (UTC) MIME-Version: 1.0 Date: Tue, 14 Jul 2020 10:07:56 +0530 From: Sai Prakash Ranjan To: Will Deacon , Jordan Crouse Subject: Re: [Freedreno] [PATCH] iommu/arm-smmu: Add a init_context_bank implementation hook In-Reply-To: <20200713191310.GD3815@jcrouse1-lnx.qualcomm.com> References: <20200611223656.4724-1-jcrouse@codeaurora.org> <20200713151123.GB3072@willie-the-truck> <20200713170032.GH21059@jcrouse1-lnx.qualcomm.com> <20200713190331.GA3444@willie-the-truck> <20200713191310.GD3815@jcrouse1-lnx.qualcomm.com> Message-ID: <928c0e7a22e9b193774b1e35fbe98762@codeaurora.org> X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200714_003800_350792_F72E63C1 X-CRM114-Status: GOOD ( 26.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, Joerg Roedel , Robin Murphy , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, freedreno@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-07-14 00:43, Jordan Crouse wrote: > On Mon, Jul 13, 2020 at 08:03:32PM +0100, Will Deacon wrote: >> On Mon, Jul 13, 2020 at 11:00:32AM -0600, Jordan Crouse wrote: >> > On Mon, Jul 13, 2020 at 04:11:23PM +0100, Will Deacon wrote: >> > > On Thu, Jun 11, 2020 at 04:36:56PM -0600, Jordan Crouse wrote: >> > > > Add a new implementation hook to allow the implementation specific code >> > > > to tweek the context bank configuration just before it gets written. >> > > > The first user will be the Adreno GPU implementation to turn on >> > > > SCTLR.HUPCF to ensure that a page fault doesn't terminating pending >> > > > transactions. Doing so could hang the GPU if one of the terminated >> > > > transactions is a CP read. >> > > > >> > > > This depends on the arm-smmu adreno SMMU implementation [1]. >> > > > >> > > > [1] https://patchwork.kernel.org/patch/11600943/ >> > > > >> > > > Signed-off-by: Jordan Crouse >> > > > --- >> > > > >> > > > drivers/iommu/arm-smmu-qcom.c | 13 +++++++++++++ >> > > > drivers/iommu/arm-smmu.c | 28 +++++++++++++--------------- >> > > > drivers/iommu/arm-smmu.h | 11 +++++++++++ >> > > > 3 files changed, 37 insertions(+), 15 deletions(-) >> > > >> > > This looks straightforward enough, but I don't want to merge this without >> > > a user and Sai's series has open questions afaict. >> > >> > Not sure what you mean by a user in this context? >> > Are you referring to https://patchwork.kernel.org/patch/11628541/? >> >> Right, this post was just a single patch in isolation, whereas it was >> reposted over at: >> >> https://lore.kernel.org/r/cdcc6a1c95a84e774790389dc8b3b7feeee490dc.1593344119.git.saiprakash.ranjan@codeaurora.org >> >> so I'll ignore this one. Sorry, I'm just really struggling to keep >> track >> of what is targetting 5.9, and I don't have tonnes of time to sift >> through >> the backlog of duplicate postings :( > > Yeah, that is our fault. There are too many cooks in the kitchen. > > We need to pick either system cache or split pagetable and serialize > the other on top of it to get the impl code going and then build from > there. > This particular patch can happily hang out in the background until the > rest is > resolved. > My bad, sorry. Let us get split pagetable support reviewed first, then I can post system cache support on top of it. As jordan said, this patch can hibernate until those get resolved. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel