From: hdegoede@redhat.com (Hans de Goede)
To: linux-arm-kernel@lists.infradead.org
Subject: [linux-sunxi] Re: [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode
Date: Fri, 20 Jan 2017 09:04:40 +0100 [thread overview]
Message-ID: <93a01892-47b5-5445-d802-f56bdac8371f@redhat.com> (raw)
In-Reply-To: <20170119202709.GA1853@excalibur.cnev.de>
HI,
On 19-01-17 21:27, Karsten Merker wrote:
> On Thu, Jan 19, 2017 at 11:10:08PM +0800, Icenowy Zheng wrote:
>> 19.01.2017, 22:34, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
>>> On Wed, Jan 18, 2017 at 04:09:32AM +0800, Chen-Yu Tsai wrote:
>>>> On Wed, Jan 18, 2017 at 4:06 AM, Maxime Ripard
>>>> <maxime.ripard@free-electrons.com> wrote:
>>>> > On Wed, Jan 18, 2017 at 12:57:08AM +0800, Icenowy Zheng wrote:
>>>> >> 17.01.2017, 16:06, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
>>>> >> > On Tue, Jan 17, 2017 at 03:14:46AM +0800, Icenowy Zheng wrote:
>>>> >> >> The PHY0 on H3 can be wired either to MUSB controller or OHCI/EHCI
>>>> >> >> controller.
>>>> >> >>
>>>> >> >> The original driver wired it to OHCI/EHCI controller; however, as the
>>>> >> >> code to use PHY0 as OHCI/EHCI is missing, it makes the PHY fully
>>>> >> >> unusable.
>>>> >> >>
>>>> >> >> Rename the register (according to its function and the name in BSP
>>>> >> >> driver), and remove the code which wires the PHY0 to OHCI/EHCI, as MUSB
>>>> >> >> can support both peripheral and host mode (although the host mode of
>>>> >> >> MUSB is buggy).
>>>> >> >
>>>> >> > Can you elaborate on that? What's wrong with it?
>>>> >>
>>>> >> The configuration is at bit 0 of register 0x20 in PHY.
>>>> >>
>>>> >> When the PHY is reseted, it defaults as MUSB mode.
>>>> >>
>>>> >> However, the original author of the H3 PHY code seems to be lack of
>>>> >> this knowledge (He named it PHY_UNK_H3), and changed the PHY to HCI
>>>> >> mode.
>>>> >>
>>>> >> I just removed the code that wires it to HCI mode, thus it will work
>>>> >> in MUSB mode, with my sun8i-h3-musb patch.
>>>> >
>>>> > I have no idea what you mean by MUSB mode.
>>>> >
>>>> > Do you mean that the previous code was only working in host mode, and
>>>> > now it only works in peripheral?
>>>>
>>>> From what I understand, with the H3, Allwinner has put a mux
>>>> in front of the MUSB controller. The mux can send the USB data
>>>> to/from the MUSB controller, or a standard EHCI/OHCI pair.
>>>> This register controls said mux.
>>>>
>>>> This means we can use a proper USB host for host mode,
>>>> instead of the limited support in MUSB.
>>>
>>> But musb can still operate as a host, right?
>>
>> Yes!
>
> Hello,
>
> I don't know how the MUSB implementation in the H3 behaves as I
> don't have any H3-based systems, but if it should happen to be
> similar to the one in the A31s, it probably isn't a full-fledged
> alternative to using an OHCI/EHCI controller.
You right it isn't which is why I suggested that the phy-sun4i-usb
code should set the mux to the OCHI/EHCI pair when the id pin
is pulled low (host-mode).
> From my practical experiments with the MUSB in the A31s in host
> mode I can report that I hadn't been able to get multiple HIDs
> (in my case keyboard and mouse) working at the same time. The
> keyboard alone worked without problems, the mouse alone worked
> without problems, but when both were connected, only one of them
> worked.
>
> I had at that time talked to Hans de Goede about the problem and
> if I remenber correctly, he had mentioned that the MUSB has
> problems servicing more than one device that does interrupt
> transfers (as HIDs do).
>
> Hans, can you perhaps shed some light on this?
Everything you've said is correct, the MUSB can emulate a
host-controller, but it is not really one and when possible
should not be used as such.
Regards,
Hans
next prev parent reply other threads:[~2017-01-20 8:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-16 19:14 [PATCH 0/4] Enable USB OTG on Allwinner H3 and two boards Icenowy Zheng
2017-01-16 19:14 ` [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode Icenowy Zheng
2017-01-16 22:57 ` [linux-sunxi] " Ondřej Jirman
2017-01-17 8:06 ` Maxime Ripard
2017-01-17 16:57 ` Icenowy Zheng
2017-01-17 20:06 ` Maxime Ripard
2017-01-17 20:09 ` Chen-Yu Tsai
2017-01-19 14:34 ` Maxime Ripard
2017-01-19 15:10 ` Icenowy Zheng
[not found] ` <20170119202709.GA1853@excalibur.cnev.de>
2017-01-20 8:04 ` Hans de Goede [this message]
2017-01-22 9:39 ` [linux-sunxi] " Icenowy Zheng
2017-01-22 9:58 ` Hans de Goede
2017-01-16 19:14 ` [PATCH 2/4] ARM: dts: sun8i: add MUSB node to H3 SoC Icenowy Zheng
2017-01-16 19:14 ` [PATCH 3/4] ARM: dts: sun8i: enable USB OTG for Orange Pi Zero board Icenowy Zheng
2017-01-16 19:14 ` [PATCH 4/4] ARM: dts: sun8i: enable USB OTG on Orange Pi One board Icenowy Zheng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=93a01892-47b5-5445-d802-f56bdac8371f@redhat.com \
--to=hdegoede@redhat.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).