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From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: chunkuang.hu@kernel.org, p.zabel@pengutronix.de,
	maarten.lankhorst@linux.intel.com, mripard@kernel.org,
	tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	matthias.bgg@gmail.com, jitao.shi@mediatek.com,
	dri-devel@lists.freedesktop.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kernel@collabora.com,
	justin.yeh@mediatek.com, jason-jh.lin@mediatek.com
Subject: Re: [PATCH v9 02/13] drm/mediatek: Implement Display Stream Compression support
Date: Sat, 19 Sep 2026 14:52:19 +0800	[thread overview]
Message-ID: <94451cc1-5dcc-4017-9b17-19fc20245ca8@rock-chips.com> (raw)
In-Reply-To: <20260916110825.102631-3-angelogioacchino.delregno@collabora.com>

Hi,

On 9/16/2026 7:08 PM, AngeloGioacchino Del Regno wrote:
> Add a real driver for the Display Stream Compression (DSC) Display
> Controller IP, implementing support for DSC v1.1 to v1.2.
> 
> In order to do this, it was necessary to remove the basic DSC IP
> bypass setup from mtk_ddp_comp: this functionality is retained in
> the new mtk_disp_dsc driver, which checks if DSC was actually
> requested by other components (with the only one that currently
> supports this being DSI) and, if not, it will set BYPASS mode in
> the DSC IP.
> 
> Like before, the BYPASS mode is set before starting the DSC IP,
> but unlike before, this is being done in the component start
> callback instead of the config one.
> Notably, the config callback is called by mtk_crtc always
> immediately before the calling start callback, so the order of
> register writes is retained.
> The only real difference is that now this is being done through
> CPU writes instead of CMDQ, but since that's called only once
> and since it's just three registers, the performance impact will
> not be minimal and not even measurable.
> 
> As anticipated, DSC handling was also introduced in the mtk_dsi
> driver: when performing dsi_host_attach, the driver now checks
> if the DSI panel adds the DSC configuration structure to the
> mipi_dsi_device structure and, if it does, it will store a
> pointer in the driver-local mtk_dsi structure's `dsc` member.
> 
> The DSI driver will then check whether the DSC configuration
> that comes from the panel is valid (in regard to MediaTek DSI)
> and will call the DRM API's DSC helpers to calculate and set
> all of the const and RC parameters for the actual DSC setup.
> 
> For the time being, even though the latest MediaTek SoCs do
> support DSC v1.2, only DSC v1.1 pre-scr support is implemented
> as an initial contribution (which is rather big, and 1.2 would
> make it even bigger - but that can anyway be implemented later).
> 
> As a last step for validation of DSC parameters in DSI, a check
> for the hdisplay against DSC slice sidth and one for vdisplay
> against DSC slice height was added to the mode_valid callback,
> making sure that H/V are, as expected, multiples of slice W/H.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  drivers/gpu/drm/mediatek/Makefile       |   1 +
>  drivers/gpu/drm/mediatek/mtk_crtc.c     |  21 ++
>  drivers/gpu/drm/mediatek/mtk_ddp_comp.c |  43 +--
>  drivers/gpu/drm/mediatek/mtk_ddp_comp.h |   9 +
>  drivers/gpu/drm/mediatek/mtk_disp_drv.h |   8 +
>  drivers/gpu/drm/mediatek/mtk_disp_dsc.c | 449 ++++++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c  |   2 +
>  drivers/gpu/drm/mediatek/mtk_drm_drv.h  |   1 +
>  drivers/gpu/drm/mediatek/mtk_dsi.c      | 151 +++++++-
>  9 files changed, 635 insertions(+), 50 deletions(-)
>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_dsc.c
> 

[...]

> +
> +	dsc->simple_422 = false;
> +	dsc->convert_rgb = true;
> +	dsc->vbr_enable = false;
> +
> +	drm_dsc_set_const_params(dsc);
> +	drm_dsc_set_rc_buf_thresh(dsc);
> +
> +	ret = drm_dsc_setup_rc_params(dsc, DRM_DSC_1_2_444);
> +	if (ret) {
> +		dev_err(dev, "Cannot find DSC RC params\n");
> +		return ret;
> +	}
> +

Just out of curiosity, is there a reason the DSC v1.1 rc parameters 
aren't used here?

-- 
Best, 
Chaoyi


  reply	other threads:[~2026-09-19  6:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-16 11:08 [PATCH v9 00/13] drm/mediatek: Add DSC, WDMA, MT8189/96 DSI support AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 01/13] dt-bindings: display: mediatek: dsc: Add MT8196 compatible AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 02/13] drm/mediatek: Implement Display Stream Compression support AngeloGioacchino Del Regno
2026-09-19  6:52   ` Chaoyi Chen [this message]
2026-09-21 10:05     ` AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 03/13] dt-bindings: display: mediatek: dsi: Document MT8189 and MT8196 AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 04/13] drm/mediatek: mtk_dsi: Cleanup encoder if reset fails during bind AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 05/13] drm/mediatek: mtk_dsi: Enable interrupt at component bind time AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 06/13] drm/mediatek: mtk_dsi: Transfer register offsets to per-SoC const AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 07/13] drm/mediatek: mtk_dsi: Move max link rate parameter to platform data AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 08/13] drm/mediatek: mtk_dsi: Add support for MT8189 AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 09/13] drm/mediatek: mtk_dsi: Add support for SRAM QoS setting AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 10/13] drm/mediatek: mtk_dsi: Add support for MT8196 AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 11/13] drm/mediatek: mtk_dsi: Enable PM Runtime on probe AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 12/13] dt-bindings: display: mediatek: wdma: Add compatibles for more SoCs AngeloGioacchino Del Regno
2026-09-16 11:08 ` [PATCH v9 13/13] drm/mediatek: Add Write DMA (WDMA) Engine for Writeback support AngeloGioacchino Del Regno

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